| Message ID | 20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-3-54c96a9d2b7f@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dt-bindings: display: qcom,sm8[56]50-mdss: properly document the interconnect paths | expand |
On 10.02.2025 10:32 AM, Neil Armstrong wrote: > The bindings requires the mdp0-mem and the cpu-cfg interconnect path, > add the missing cpu-cfg path to fix the dtbs check error. > > Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { > > power-domains = <&dispcc MDSS_GDSC>; > > - interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; > - interconnect-names = "mdp0-mem"; > + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, QCOM_ICC_TAG_ALWAYS > + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; QCOM_ICC_TAG_ACTIVE_ONLY w that Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
On 10/02/2025 17:32, Konrad Dybcio wrote: > On 10.02.2025 10:32 AM, Neil Armstrong wrote: >> The bindings requires the mdp0-mem and the cpu-cfg interconnect path, >> add the missing cpu-cfg path to fix the dtbs check error. >> >> Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >> --- >> arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi >> index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi >> @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { >> >> power-domains = <&dispcc MDSS_GDSC>; >> >> - interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; >> - interconnect-names = "mdp0-mem"; >> + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, > > QCOM_ICC_TAG_ALWAYS > >> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; > > QCOM_ICC_TAG_ACTIVE_ONLY > > w that So it depends how it articulates with https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/ I can rebase on top of it, it would be simpler, but then the Fixes tag won't work anymore. > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > Konrad
On 11.02.2025 10:07 AM, Neil Armstrong wrote: > On 10/02/2025 17:32, Konrad Dybcio wrote: >> On 10.02.2025 10:32 AM, Neil Armstrong wrote: >>> The bindings requires the mdp0-mem and the cpu-cfg interconnect path, >>> add the missing cpu-cfg path to fix the dtbs check error. >>> >>> Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") >>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >>> --- >>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- >>> 1 file changed, 3 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { >>> power-domains = <&dispcc MDSS_GDSC>; >>> - interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; >>> - interconnect-names = "mdp0-mem"; >>> + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, >> >> QCOM_ICC_TAG_ALWAYS >> >>> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; >> >> QCOM_ICC_TAG_ACTIVE_ONLY >> >> w that > > So it depends how it articulates with https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/ > > I can rebase on top of it, it would be simpler, but then the Fixes tag won't work anymore. The fixes tag is there for human eyes, autoselection for backports has always been iffy with DT Konrad
On Tue, Feb 11, 2025 at 10:07:07AM +0100, Neil Armstrong wrote: > On 10/02/2025 17:32, Konrad Dybcio wrote: > > On 10.02.2025 10:32 AM, Neil Armstrong wrote: > > > The bindings requires the mdp0-mem and the cpu-cfg interconnect path, > > > add the missing cpu-cfg path to fix the dtbs check error. > > > > > > Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") > > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > > > --- > > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- > > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 > > > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { > > > power-domains = <&dispcc MDSS_GDSC>; > > > - interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; > > > - interconnect-names = "mdp0-mem"; > > > + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, > > > > QCOM_ICC_TAG_ALWAYS > > > > > + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; > > > > QCOM_ICC_TAG_ACTIVE_ONLY > > > > w that > > So it depends how it articulates with https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/ > > I can rebase on top of it, it would be simpler, but then the Fixes tag won't work anymore. It works, it's just that the backporter would need to be slightly more careful. > > > > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > > > Konrad >
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { power-domains = <&dispcc MDSS_GDSC>; - interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem"; + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; + interconnect-names = "mdp0-mem", "cpu-cfg"; iommus = <&apps_smmu 0x1c00 0x2>;
The bindings requires the mdp0-mem and the cpu-cfg interconnect path, add the missing cpu-cfg path to fix the dtbs check error. Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)