| Message ID | 20250213071912.2930066-3-quic_mmanikan@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add PCIe support for IPQ5424 | expand |
On Thu, Feb 13, 2025 at 12:49:12PM +0530, Manikanta Mylavarapu wrote: > Enable the PCIe controller and PHY nodes corresponding to RDP466. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- > Changes in V4: > - Added a new line before status in pcie2 and pcie3 nodes. > - Dropped 'output-low' property from pcie2-default-state and > pcie3-default-state nodes. > > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- > 1 file changed, 40 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > index b6e4bb3328b3..e73f61266012 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > @@ -53,6 +53,32 @@ &dwc_1 { > dr_mode = "host"; > }; > > +&pcie2 { > + pinctrl-0 = <&pcie2_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; Don't you also need wake-gpios? Here and in pcie3. > + > + status = "okay"; > +}; > + > +&pcie2_phy { > + status = "okay"; > +}; > + > +&pcie3 { > + pinctrl-0 = <&pcie3_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; > + > + status = "okay"; > +}; > + > +&pcie3_phy { > + status = "okay"; > +}; > + > &qusb_phy_0 { > vdd-supply = <&vreg_misc_0p925>; > vdda-pll-supply = <&vreg_misc_1p8>; > @@ -147,6 +173,20 @@ data-pins { > bias-pull-up; > }; > }; > + > + pcie2_default_state: pcie2-default-state { > + pins = "gpio31"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + pcie3_default_state: pcie3-default-state { > + pins = "gpio34"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > }; > > &uart1 { > @@ -166,4 +206,3 @@ &usb3 { > &xo_board { > clock-frequency = <24000000>; > }; > - > -- > 2.34.1 >
On 2/13/2025 6:47 PM, Dmitry Baryshkov wrote: > On Thu, Feb 13, 2025 at 12:49:12PM +0530, Manikanta Mylavarapu wrote: >> Enable the PCIe controller and PHY nodes corresponding to RDP466. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- >> Changes in V4: >> - Added a new line before status in pcie2 and pcie3 nodes. >> - Dropped 'output-low' property from pcie2-default-state and >> pcie3-default-state nodes. >> >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >> 1 file changed, 40 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index b6e4bb3328b3..e73f61266012 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -53,6 +53,32 @@ &dwc_1 { >> dr_mode = "host"; >> }; >> >> +&pcie2 { >> + pinctrl-0 = <&pcie2_default_state>; >> + pinctrl-names = "default"; >> + >> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; > > Don't you also need wake-gpios? Here and in pcie3. > Hi Dmitry, Thank you for reviewing the patch. The wake gpio is dropped because the PCIe on the IPQ5424 doesn't support low power mode. Thanks & Regards, Manikanta.
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts index b6e4bb3328b3..e73f61266012 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -53,6 +53,32 @@ &dwc_1 { dr_mode = "host"; }; +&pcie2 { + pinctrl-0 = <&pcie2_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie2_phy { + status = "okay"; +}; + +&pcie3 { + pinctrl-0 = <&pcie3_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie3_phy { + status = "okay"; +}; + &qusb_phy_0 { vdd-supply = <&vreg_misc_0p925>; vdda-pll-supply = <&vreg_misc_1p8>; @@ -147,6 +173,20 @@ data-pins { bias-pull-up; }; }; + + pcie2_default_state: pcie2-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pcie3_default_state: pcie3-default-state { + pins = "gpio34"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; }; &uart1 { @@ -166,4 +206,3 @@ &usb3 { &xo_board { clock-frequency = <24000000>; }; -
Enable the PCIe controller and PHY nodes corresponding to RDP466. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- Changes in V4: - Added a new line before status in pcie2 and pcie3 nodes. - Dropped 'output-low' property from pcie2-default-state and pcie3-default-state nodes. arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-)