@@ -880,8 +880,14 @@ pcie1: pcie@10000000 {
<0x10000f20 0xa8>,
<0x10001000 0x1000>,
<0x000f8000 0x4000>,
- <0x10100000 0x1000>;
- reg-names = "dbi", "elbi", "atu", "parf", "config";
+ <0x10100000 0x1000>,
+ <0x000fe000 0x1000>;
+ reg-names = "dbi",
+ "elbi",
+ "atu",
+ "parf",
+ "config",
+ "mhi";
device_type = "pci";
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
@@ -960,8 +966,14 @@ pcie3: pcie@18000000 {
<0x18000f20 0xa8>,
<0x18001000 0x1000>,
<0x000f0000 0x4000>,
- <0x18100000 0x1000>;
- reg-names = "dbi", "elbi", "atu", "parf", "config";
+ <0x18100000 0x1000>,
+ <0x000f6000 0x1000>;
+ reg-names = "dbi",
+ "elbi",
+ "atu",
+ "parf",
+ "config",
+ "mhi";
device_type = "pci";
linux,pci-domain = <3>;
bus-range = <0x00 0xff>;
@@ -1040,8 +1052,14 @@ pcie2: pcie@20000000 {
<0x20000f20 0xa8>,
<0x20001000 0x1000>,
<0x00088000 0x4000>,
- <0x20100000 0x1000>;
- reg-names = "dbi", "elbi", "atu", "parf", "config";
+ <0x20100000 0x1000>,
+ <0x0008e000 0x1000>;
+ reg-names = "dbi",
+ "elbi",
+ "atu",
+ "parf",
+ "config",
+ "mhi";
device_type = "pci";
linux,pci-domain = <2>;
bus-range = <0x00 0xff>;
@@ -1120,8 +1138,14 @@ pcie0: pci@28000000 {
<0x28000f20 0xa8>,
<0x28001000 0x1000>,
<0x00080000 0x4000>,
- <0x28100000 0x1000>;
- reg-names = "dbi", "elbi", "atu", "parf", "config";
+ <0x28100000 0x1000>,
+ <0x00086000 0x1000>;
+ reg-names = "dbi",
+ "elbi",
+ "atu",
+ "parf",
+ "config",
+ "mhi";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
Append the MHI range to the pcie nodes. Append the MHI register range to IPQ9574. This is an optional range used by the dwc controller driver to print debug stats via the debugfs file 'link_transition_count'. Convert reg-names to vertical list. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- v13: Update commit msg Remove 'fixes' v12: New patch introduced in this patchset. MHI range was missed in the initial post --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 40 +++++++++++++++++++++------ 1 file changed, 32 insertions(+), 8 deletions(-)