From patchwork Mon Mar 17 05:41:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prasad Kumpatla X-Patchwork-Id: 14018670 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7786C219312; Mon, 17 Mar 2025 05:42:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742190157; cv=none; b=BBQGpujO6wCDzQJPNNNYMwORLkH8I1Pw+DD3vtz43b0J5pP6Uf7DNx1hmJjS8KredM+G1rF8KMchiY7OCFtQPMadg8mYcmjn5UQoYKIe0AgKdgUsdsqZQ2PRegPii2pxUh5u5XWHK/u7vrA+rsjyTk4+gWH9dezSts90s53/1LY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742190157; c=relaxed/simple; bh=h4X5rNq9MVC9dP3IjkrzAtiuRBjUb2b9XrtxvqFOskM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=NZ5kYGcZAqeSkX+79xMUNXOCCZi6lH48k569Hb3mtAPca7SnY701aLJAwkUI9dIZUYq3YEGyAQyGCak1dEGluYOPnNWk83aNwI+SABqNMDqI/zaBCa6kgVOMQTU+Y8nD+XBiDMod5ShHH2ZgSCeVNwKqSoPMNPMCzrUMCbZjj1o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NEGWNMRq; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NEGWNMRq" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52GKv8ec000584; Mon, 17 Mar 2025 05:42:33 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:date:from:in-reply-to:message-id:references:subject:to; s= qcppdkim1; bh=4efJPnqKBfzFnr8lLlwXH/oMhO/6KrXVManPo8TBwZI=; b=NE GWNMRq0COZjwQ4IdTUhEZ6edy7xllnbjg8Ph/s1LhA1zr0E71DQg228ERCqDOrrs kb0mVSY6txQ4mHCa1hg+JOtd0RgVIGY6DNXdeycTFlptKuU1hGYFwUQwPka/gxaY GB8sgnr0JaZxtUuJ92T0NBjg9UK9B0ZKB6pEtE7eByexWQ+ZOhBzbDvy0RqUwvK0 fzQ8stL+E4Oz9H5gtn8lRbgEuWrJiHm7pBWcqmcAY2gsTE6Rcp56OG6CGL/rYtSP O48aWN6C8j0BU0eK6ual5segUvN9L4kDiwt1rG84fxQfY9q+944Lk/TczgQk4t+I zBE/CUW7Oxzlz2IQX5Jg== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 45d2u9ufcw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Mar 2025 05:42:33 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 52H5gEp3015790; Mon, 17 Mar 2025 05:42:14 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 45dkgm3pq1-1; Mon, 17 Mar 2025 05:42:14 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 52H5gEpb015799; Mon, 17 Mar 2025 05:42:14 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-pkumpatl-hyd.qualcomm.com [10.213.109.81]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 52H5gDBN015775; Mon, 17 Mar 2025 05:42:14 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 3914174) id 4BCC8571AC1; Mon, 17 Mar 2025 11:12:13 +0530 (+0530) From: Prasad Kumpatla To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_pkumpatl@quicinc.com, kernel@oss.qualcomm.com, Mohammad Rafi Shaik Subject: [PATCH v1 2/8] arm64: dts: qcom: sc7280: Add WSA SoundWire and LPASS support Date: Mon, 17 Mar 2025 11:11:45 +0530 Message-Id: <20250317054151.6095-3-quic_pkumpatl@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250317054151.6095-1-quic_pkumpatl@quicinc.com> References: <20250317054151.6095-1-quic_pkumpatl@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=JsfxrN4C c=1 sm=1 tr=0 ts=67d7b649 cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=Hk-fo3U6da086cNuBgYA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: 8HGYnnkK_Hmrny3iixxuVMq-zdit7bCY X-Proofpoint-ORIG-GUID: 8HGYnnkK_Hmrny3iixxuVMq-zdit7bCY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-17_01,2025-03-17_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 mlxlogscore=945 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503170040 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: From: Mohammad Rafi Shaik Add WSA macroLPASS Codecs along with SoundWire controller. Signed-off-by: Mohammad Rafi Shaik Co-developed-by: Prasad Kumpatla Signed-off-by: Prasad Kumpatla --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 68 ++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 39fbd3c40e47..90b2f6e2b7c0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2602,6 +2602,64 @@ swr1: soundwire@3230000 { status = "disabled"; }; + lpass_wsa_macro: codec@3240000 { + compatible = "qcom,sc7280-lpass-wsa-macro"; + reg = <0x0 0x03240000 0x0 0x1000>; + + pinctrl-names = "default"; + pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>; + + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>, + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "fsgen"; + + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>, + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + power-domain-names = "macro", "dcodec"; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + + status = "disabled"; + }; + + swr2: soundwire@3250000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x0 0x03250000 0x0 0x2000>; + + interrupts = ; + clocks = <&lpass_wsa_macro>; + clock-names = "iface"; + + qcom,din-ports = <2>; + qcom,dout-ports = <6>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 + 0x1f 0x3f 0x0f 0x0f>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; + qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01 + 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + status = "disabled"; + }; + lpass_audiocc: clock-controller@3300000 { compatible = "qcom,sc7280-lpassaudiocc"; reg = <0 0x03300000 0 0x30000>, @@ -2808,6 +2866,16 @@ lpass_tx_swr_data: tx-swr-data-state { pins = "gpio1", "gpio2", "gpio14"; function = "swr_tx_data"; }; + + lpass_wsa_swr_clk: wsa-swr-clk-state { + pins = "gpio10"; + function = "wsa_swr_clk"; + }; + + lpass_wsa_swr_data: wsa-swr-data-state { + pins = "gpio11"; + function = "wsa_swr_data"; + }; }; gpu: gpu@3d00000 {