| Message ID | 20250403-dt-cpu-schema-v1-17-076be7171a85@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Arm cpu schema clean-ups | expand |
Il 04/04/25 04:59, Rob Herring (Arm) ha scritto: > The Arm CPU schema is missing a number of properties already in use. > This has gone unnoticed as extra properties have not been restricted. > Add a missing reference to cpu.yaml, and add all the missing properties. > > As "clock-latency" and "voltage-tolerance" are related to opp-v1, add > those properties to the opp-v1.yaml schema. > > With this, other properties can be prevented from creeping in with > 'unevaluatedProperties: false'. > > Signed-off-by: Rob Herring (Arm) <robh@kernel.org> > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 46 ++++++++++++++++++++++- > Documentation/devicetree/bindings/opp/opp-v1.yaml | 16 ++++++++ > 2 files changed, 61 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index 3d2b6286efb8..6f74ebfd38df 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -299,6 +299,16 @@ properties: > > where voltage is in V, frequency is in MHz. > > + interconnects: > + minItems: 1 > + maxItems: 2 > + > + nvmem-cells: > + maxItems: 1 > + > + nvmem-cell-names: > + const: speed_grade > + > performance-domains: > maxItems: 1 > > @@ -317,6 +327,31 @@ properties: > corresponding to the index of an SCMI performance domain provider, must be > "perf". > > + resets: > + maxItems: 1 > + > + arm-supply: > + deprecated: true > + description: Use 'cpu-supply' instead > + > + cpu0-supply: > + deprecated: true > + description: Use 'cpu-supply' instead > + > + mem-supply: true > + > + proc-supply: > + deprecated: true > + description: Use 'cpu-supply' instead > + > + sram-supply: > + deprecated: true > + description: Use 'mem-supply' instead > + > + mediatek,cci: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: Link to Mediatek Cache Coherent Interconnect s/Mediatek/MediaTek/g please :-) Anyway: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 3d2b6286efb8..6f74ebfd38df 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -299,6 +299,16 @@ properties: where voltage is in V, frequency is in MHz. + interconnects: + minItems: 1 + maxItems: 2 + + nvmem-cells: + maxItems: 1 + + nvmem-cell-names: + const: speed_grade + performance-domains: maxItems: 1 @@ -317,6 +327,31 @@ properties: corresponding to the index of an SCMI performance domain provider, must be "perf". + resets: + maxItems: 1 + + arm-supply: + deprecated: true + description: Use 'cpu-supply' instead + + cpu0-supply: + deprecated: true + description: Use 'cpu-supply' instead + + mem-supply: true + + proc-supply: + deprecated: true + description: Use 'cpu-supply' instead + + sram-supply: + deprecated: true + description: Use 'mem-supply' instead + + mediatek,cci: + $ref: /schemas/types.yaml#/definitions/phandle + description: Link to Mediatek Cache Coherent Interconnect + qcom,saw: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -327,6 +362,11 @@ properties: description: Specifies the ACC node associated with this CPU. + qcom,freq-domain: + description: Specifies the QCom CPUFREQ HW associated with the CPU. + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + rockchip,pmu: $ref: /schemas/types.yaml#/definitions/phandle description: > @@ -352,7 +392,11 @@ properties: formed by encoding the target CPU id into the low bits of the physical start address it should jump to. + thermal-idle: + type: object + allOf: + - $ref: /schemas/cpu.yaml# - $ref: /schemas/opp/opp-v1.yaml# - if: # If the enable-method property contains one of those values @@ -407,7 +451,7 @@ required: dependencies: rockchip,pmu: [enable-method] -additionalProperties: true +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml index 1b59b103dab6..61c080e50859 100644 --- a/Documentation/devicetree/bindings/opp/opp-v1.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v1.yaml @@ -21,6 +21,18 @@ description: |+ deprecated: true properties: + clock-latency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The latency in nanoseconds for clock changes. Use OPP tables for new + designs instead. + + voltage-tolerance: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 10 + description: + The voltage tolerance in percent. Use OPP tables for new designs instead. + operating-points: $ref: /schemas/types.yaml#/definitions/uint32-matrix items: @@ -28,8 +40,12 @@ properties: - description: Frequency in kHz - description: Voltage for OPP in uV +dependencies: + clock-latency: [ operating-points ] + voltage-tolerance: [ operating-points ] additionalProperties: true + examples: - | cpus {
The Arm CPU schema is missing a number of properties already in use. This has gone unnoticed as extra properties have not been restricted. Add a missing reference to cpu.yaml, and add all the missing properties. As "clock-latency" and "voltage-tolerance" are related to opp-v1, add those properties to the opp-v1.yaml schema. With this, other properties can be prevented from creeping in with 'unevaluatedProperties: false'. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> --- Documentation/devicetree/bindings/arm/cpus.yaml | 46 ++++++++++++++++++++++- Documentation/devicetree/bindings/opp/opp-v1.yaml | 16 ++++++++ 2 files changed, 61 insertions(+), 1 deletion(-)