@@ -4,15 +4,23 @@ / {
cpus {
cpu@0 {
enable-method = "qcom,msm8916-smp";
+ qcom,acc = <&cpu0_acc>;
+ qcom,saw = <&cpu0_saw>;
};
cpu@1 {
enable-method = "qcom,msm8916-smp";
+ qcom,acc = <&cpu1_acc>;
+ qcom,saw = <&cpu1_saw>;
};
cpu@2 {
enable-method = "qcom,msm8916-smp";
+ qcom,acc = <&cpu2_acc>;
+ qcom,saw = <&cpu2_saw>;
};
cpu@3 {
enable-method = "qcom,msm8916-smp";
+ qcom,acc = <&cpu3_acc>;
+ qcom,saw = <&cpu3_saw>;
};
idle-states {
@@ -144,8 +144,6 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
- qcom,acc = <&cpu0_acc>;
- qcom,saw = <&cpu0_saw>;
};
cpu1: cpu@1 {
@@ -159,8 +157,6 @@ cpu1: cpu@1 {
#cooling-cells = <2>;
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
- qcom,acc = <&cpu1_acc>;
- qcom,saw = <&cpu1_saw>;
};
cpu2: cpu@2 {
@@ -174,8 +170,6 @@ cpu2: cpu@2 {
#cooling-cells = <2>;
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
- qcom,acc = <&cpu2_acc>;
- qcom,saw = <&cpu2_saw>;
};
cpu3: cpu@3 {
@@ -189,8 +183,6 @@ cpu3: cpu@3 {
#cooling-cells = <2>;
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
- qcom,acc = <&cpu3_acc>;
- qcom,saw = <&cpu3_saw>;
};
l2_0: l2-cache {
The "qcom,acc" and "qcom,saw" properties are only used with 32-bit kernels. Of course, booting a 64-bit or 32-bit kernel shouldn't matter to the DTS, but the "enable-method" is already different for 32-bit. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> --- arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi | 8 ++++++++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 -------- 2 files changed, 8 insertions(+), 8 deletions(-)