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Wed, 13 Sep 2023 13:44:16 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::faf:4cd0:ae27:1073]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::faf:4cd0:ae27:1073%6]) with mapi id 15.20.6768.036; Wed, 13 Sep 2023 13:44:16 +0000 From: Jason Gunthorpe To: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang Cc: Lu Baolu , Dmitry Osipenko , Jerry Snitselaar , Marek Szyprowski , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: [PATCH v8 22/24] iommu: Add ops->domain_alloc_paging() Date: Wed, 13 Sep 2023 10:43:55 -0300 Message-ID: <22-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com> In-Reply-To: <0-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR03CA0003.namprd03.prod.outlook.com (2603:10b6:208:23a::8) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ2PR12MB7848:EE_ X-MS-Office365-Filtering-Correlation-Id: 1c23e77d-dcb5-45a4-ddf5-08dbb45f84b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 73rlS5TIEJDkK8IrcSrJ2W13N5gpDhAkVK8GrL1HHvGgPJ9Pp0oCUgCyMlCySujt9wDDzeyvWfqonmYYjSeAI/DXV1GYQNUJxB2Zg1lJJq1AQXxIyQ6z472jTImTtEg2DQQxHKOwiaojNSvjf9ppcs0tUc0PYf9NkNg1LJVw9HEzyZrwL1xWb7JQ4tClzwc7zs4rlVCVNVM6dpK8YghJ5ZjOZJOgvGUAGfD2SoQObBJUiU95wVWNoppZyFhoPsh55UMNL/LFMTaVyTbU3Rt+W6LvyruCjZBqENWGrFg2pg/+NK5pbVejcdEFM1TBuRndzhP2KIzGz8lNiAMQF2Vkm9qxJ3t6WcV71iofbLJgOBxvVJLH7WidgyATMqSGHYGO9XggdiK5Hp2pE3LmifM3XnyHp4VAm62sypvBGnfYU7CnjLaxrD+syAfvVrUXDitZxn85Y1SUDWJcJPaqErR7iL/iDBH58FF3IKWodToa7A4KOsNepcAj6PEKWX17E6T3nImwS4J3mx5BNXkExkn+f2IpAo8KqZ0rVeIRR5m7cqS4Q5sVX6SGzmvslmDdZmllIfjm6TD+sFbj5iInuYJd1gkBBbfA0Gr0ya8jTEL35Mqh6B29PUi4BkuqkMIuhaSGKKS/wvQ7lyb6hCeZ9QCWa4MfLOUNkeAe9v3+ZSFCsPP8fwqC0DyONTcDlST7U8uIZrEMdopB9quJDkL35w9IcsnldWD8gb0wHte04T98GsuqkRcJJ79WdcbqgLjQJwhaXCrf95MlSu+f5k8V4Y76hhXI1pfLwCbLPEk4RhDFC6iFxIJoM6SugyNmpLvCRlariCJY48BjprwHulNk/7fo86EfO9UOnPysoivBUJXUj2+Qha/vEBALExePPp1MfQcg0DcOWgHx8D6XF2sFMxlVWYpEzYR4Z1CRQ0N+t7je4LXor5GU4g0knEM5r1vs0yl5JlVinukcm/L56cjAT5dJ4+oJbEwaGH7d6QYLmZ22LcDjVvsUbD9orbLnFyXI1FIkonsnWvEsJnXNasgDEV+Xe9t9S6nKF7O4aXNcDOFRe5ZnlmTGHVfNGGnO6Q//2qv9JUeVvovmOxfXi/WZURGa8Mpr/b8ZhVOaGGHKkgC09zhggzWa0eWN7cQkKfMOhLZip1qcHwDT2uKynwZsWZqBcGC2zHuVnP9PO7X7wPWF619AFd1OGR2ARfsWhq/Z2P2bAYBAGl63KCdriFaiys4FSl4K2+ZA0KGfijLTPraBzZub98S5B2U5nK1nE+jAOQLG8IoJ3XwDM6drgW1O0M+ozdgX6DURnRxzNxjU5YV4bL87XP0rD6koaMv5Y1mYn3i2l7zpMJoft1mFiggpa6WL+Kow/cTb8WWTsX7EW/73B3vopieGoqh3taSu54Hv945K1vAoZKNdrRLMBFIDqRhD0uHgprjbEt6R2syCCoVug5U3qbm61X9VrLxq3Fk9rztmqMpfM+NpOfEb7PtnrfChekpcwksTIQ5nXvJEG5QlyA46ENriXxe9IqdircNMFlqn2nGDbIYlIOaaZXymUpAiKHU5yUFMPApn9yxLCac/TcfHo8QMycC8lhVwcGVPDvFX X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1c23e77d-dcb5-45a4-ddf5-08dbb45f84b4 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2023 13:44:14.6445 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: hhBnNIkNfGAR0nOByu6fGDu382Xv3IyVUEelbUCJ9rsXlDp7ICgwMNcpis+fZSyW X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB7848 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This callback requests the driver to create only a __IOMMU_DOMAIN_PAGING domain, so it saves a few lines in a lot of drivers needlessly checking the type. More critically, this allows us to sweep out all the IOMMU_DOMAIN_UNMANAGED and IOMMU_DOMAIN_DMA checks from a lot of the drivers, simplifying what is going on in the code and ultimately removing the now-unused special cases in drivers where they did not support IOMMU_DOMAIN_DMA. domain_alloc_paging() should return a struct iommu_domain that is functionally compatible with ARM_DMA_USE_IOMMU, dma-iommu.c and iommufd. Be forwards looking and pass in a 'struct device *' argument. We can provide this when allocating the default_domain. No drivers will look at this. Tested-by: Steven Price Tested-by: Marek Szyprowski Tested-by: Nicolin Chen Reviewed-by: Lu Baolu Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 17 ++++++++++++++--- include/linux/iommu.h | 3 +++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 38856d542afc35..fe033043be467a 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2041,6 +2041,7 @@ void iommu_set_fault_handler(struct iommu_domain *domain, EXPORT_SYMBOL_GPL(iommu_set_fault_handler); static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, + struct device *dev, unsigned int type) { struct iommu_domain *domain; @@ -2048,8 +2049,13 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, if (alloc_type == IOMMU_DOMAIN_IDENTITY && ops->identity_domain) return ops->identity_domain; + else if (type & __IOMMU_DOMAIN_PAGING && ops->domain_alloc_paging) + domain = ops->domain_alloc_paging(dev); + else if (ops->domain_alloc) + domain = ops->domain_alloc(alloc_type); + else + return NULL; - domain = ops->domain_alloc(alloc_type); if (!domain) return NULL; @@ -2074,14 +2080,19 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, static struct iommu_domain * __iommu_group_domain_alloc(struct iommu_group *group, unsigned int type) { - return __iommu_domain_alloc(group_iommu_ops(group), type); + struct device *dev = + list_first_entry(&group->devices, struct group_device, list) + ->dev; + + return __iommu_domain_alloc(group_iommu_ops(group), dev, type); } struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus) { if (bus == NULL || bus->iommu_ops == NULL) return NULL; - return __iommu_domain_alloc(bus->iommu_ops, IOMMU_DOMAIN_UNMANAGED); + return __iommu_domain_alloc(bus->iommu_ops, NULL, + IOMMU_DOMAIN_UNMANAGED); } EXPORT_SYMBOL_GPL(iommu_domain_alloc); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 511dfeea527215..3f173307434dcc 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -239,6 +239,8 @@ struct iommu_iotlb_gather { * use. The information type is one of enum iommu_hw_info_type defined * in include/uapi/linux/iommufd.h. * @domain_alloc: allocate iommu domain + * @domain_alloc_paging: Allocate an iommu_domain that can be used for + * UNMANAGED, DMA, and DMA_FQ domain types. * @probe_device: Add device to iommu driver handling * @release_device: Remove device from iommu driver handling * @probe_finalize: Do final setup work after the device is added to an IOMMU @@ -273,6 +275,7 @@ struct iommu_ops { /* Domain allocation and freeing by the iommu driver */ struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); + struct iommu_domain *(*domain_alloc_paging)(struct device *dev); struct iommu_device *(*probe_device)(struct device *dev); void (*release_device)(struct device *dev);