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Thu, 22 Sep 2022 01:53:47 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 22 Sep 2022 01:53:47 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Thu, 22 Sep 2022 01:53:46 -0700 From: Nicolin Chen To: , , , , , , CC: , , , , Subject: [PATCH v5 1/6] iommu/msm: Fix error-out routine in msm_iommu_attach_dev() Date: Thu, 22 Sep 2022 01:53:44 -0700 Message-ID: <23e009bba72c3e46320c59acefbbdd976111cc8a.1663836372.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B077:EE_|DS0PR12MB6629:EE_ X-MS-Office365-Filtering-Correlation-Id: f75ce6fe-c8c9-47f3-0d26-08da9c77ff50 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2022 08:54:02.3261 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f75ce6fe-c8c9-47f3-0d26-08da9c77ff50 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B077.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6629 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The error-out routine is missing all the reverting pieces for the iop and attached-ctx allocations. And clock enable/disable is unbalanced too. Fix it by adding __disable_clocks() and calling msm_iommu_detach_dev() at the end of the msm_iommu_attach_dev() if "ret" is non-zero. Also set the master->num to 0 in the detach_dev() since attach_dev() would check it. Fixes: 109bd48ea2e1 ("iommu/msm: Add DT adaptation") Cc: stable@vger.kernel.org Cc: Sricharan R Cc: Andy Gross Cc: Bjorn Andersson Cc: Konrad Dybcio Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/msm_iommu.c | 59 +++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 6a24aa804ea3..14df722f0060 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -394,6 +394,34 @@ static struct iommu_device *msm_iommu_probe_device(struct device *dev) return &iommu->iommu; } +static void msm_iommu_detach_dev(struct iommu_domain *domain, + struct device *dev) +{ + struct msm_priv *priv = to_msm_priv(domain); + unsigned long flags; + struct msm_iommu_dev *iommu; + struct msm_iommu_ctx_dev *master; + int ret; + + free_io_pgtable_ops(priv->iop); + + spin_lock_irqsave(&msm_iommu_lock, flags); + list_for_each_entry(iommu, &priv->list_attached, dom_node) { + ret = __enable_clocks(iommu); + if (ret) + goto fail; + + list_for_each_entry(master, &iommu->ctx_list, list) { + msm_iommu_free_ctx(iommu->context_map, master->num); + __reset_context(iommu->base, master->num); + master->num = 0; + } + __disable_clocks(iommu); + } +fail: + spin_unlock_irqrestore(&msm_iommu_lock, flags); +} + static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) { int ret = 0; @@ -418,6 +446,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) list_for_each_entry(master, &iommu->ctx_list, list) { if (master->num) { dev_err(dev, "domain already attached"); + __disable_clocks(iommu); ret = -EEXIST; goto fail; } @@ -425,6 +454,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) msm_iommu_alloc_ctx(iommu->context_map, 0, iommu->ncb); if (IS_ERR_VALUE(master->num)) { + __disable_clocks(iommu); ret = -ENODEV; goto fail; } @@ -439,37 +469,12 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) fail: spin_unlock_irqrestore(&msm_iommu_lock, flags); + if (ret) + msm_iommu_detach_dev(domain, dev); return ret; } -static void msm_iommu_detach_dev(struct iommu_domain *domain, - struct device *dev) -{ - struct msm_priv *priv = to_msm_priv(domain); - unsigned long flags; - struct msm_iommu_dev *iommu; - struct msm_iommu_ctx_dev *master; - int ret; - - free_io_pgtable_ops(priv->iop); - - spin_lock_irqsave(&msm_iommu_lock, flags); - list_for_each_entry(iommu, &priv->list_attached, dom_node) { - ret = __enable_clocks(iommu); - if (ret) - goto fail; - - list_for_each_entry(master, &iommu->ctx_list, list) { - msm_iommu_free_ctx(iommu->context_map, master->num); - __reset_context(iommu->base, master->num); - } - __disable_clocks(iommu); - } -fail: - spin_unlock_irqrestore(&msm_iommu_lock, flags); -} - static int msm_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t pa, size_t len, int prot, gfp_t gfp) {