| Message ID | 2526d2b2907116d1bb6f7edd194226eb7e24c333.1584516925.git.amit.kucheria@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] dt-bindings: arm: cpus: Add kryo468 compatible | expand |
Quoting Amit Kucheria (2020-03-18 02:08:17) > "arm,armv8" compatible should only be used for software models. Replace > it with the real cpu type. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- Maybe add a fixes tag too? Reviewed-by: Stephen Boyd <swboyd@chromium.org>
On 3/18/2020 2:38 PM, Amit Kucheria wrote: > "arm,armv8" compatible should only be used for software models. Replace > it with the real cpu type. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org> > arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 8011c5fe2a31..a01dfefd90be 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -83,7 +83,7 @@ > > CPU0: cpu@0 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x0>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > @@ -100,7 +100,7 @@ > > CPU1: cpu@100 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x100>; > enable-method = "psci"; > next-level-cache = <&L2_100>; > @@ -114,7 +114,7 @@ > > CPU2: cpu@200 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x200>; > enable-method = "psci"; > next-level-cache = <&L2_200>; > @@ -128,7 +128,7 @@ > > CPU3: cpu@300 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x300>; > enable-method = "psci"; > next-level-cache = <&L2_300>; > @@ -142,7 +142,7 @@ > > CPU4: cpu@400 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x400>; > enable-method = "psci"; > next-level-cache = <&L2_400>; > @@ -156,7 +156,7 @@ > > CPU5: cpu@500 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x500>; > enable-method = "psci"; > next-level-cache = <&L2_500>; > @@ -170,7 +170,7 @@ > > CPU6: cpu@600 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x600>; > enable-method = "psci"; > next-level-cache = <&L2_600>; > @@ -184,7 +184,7 @@ > > CPU7: cpu@700 { > device_type = "cpu"; > - compatible = "arm,armv8"; > + compatible = "qcom,kryo468"; > reg = <0x0 0x700>; > enable-method = "psci"; > next-level-cache = <&L2_700>; >
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8011c5fe2a31..a01dfefd90be 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -83,7 +83,7 @@ CPU0: cpu@0 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; @@ -100,7 +100,7 @@ CPU1: cpu@100 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; @@ -114,7 +114,7 @@ CPU2: cpu@200 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; @@ -128,7 +128,7 @@ CPU3: cpu@300 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; @@ -142,7 +142,7 @@ CPU4: cpu@400 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; @@ -156,7 +156,7 @@ CPU5: cpu@500 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; @@ -170,7 +170,7 @@ CPU6: cpu@600 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; @@ -184,7 +184,7 @@ CPU7: cpu@700 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>;
"arm,armv8" compatible should only be used for software models. Replace it with the real cpu type. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)