From patchwork Tue Aug 28 13:38:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 10578489 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4103814BD for ; Tue, 28 Aug 2018 13:39:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 31CBD2A291 for ; Tue, 28 Aug 2018 13:39:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 25BCD2A299; Tue, 28 Aug 2018 13:39:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C8F242A298 for ; Tue, 28 Aug 2018 13:39:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728205AbeH1Rbd (ORCPT ); Tue, 28 Aug 2018 13:31:33 -0400 Received: from mail-ed1-f67.google.com ([209.85.208.67]:35892 "EHLO mail-ed1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727201AbeH1Rbc (ORCPT ); Tue, 28 Aug 2018 13:31:32 -0400 Received: by mail-ed1-f67.google.com with SMTP id f4-v6so1407779edq.3 for ; Tue, 28 Aug 2018 06:39:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=KGPNhtmxbZmY2SbJ8bQ/3ZZChD9pwNRV/BvwQjyiwy0=; b=jRz3TMe71F2b9UgCkzD8872RQyACr9ec+apqRnpZ79KaxeZs95GJKrl7EJ7TP00HmN oBiZ0SKVAN6ysQkAy+RL2UDW4xGMHE6tXVr/nRVaYGwrXKeiZkuR8q3sd9mnYnR+th+G fpdheiArd7vZQW4X0JODc4FlL8p+MrCKfCZVs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=KGPNhtmxbZmY2SbJ8bQ/3ZZChD9pwNRV/BvwQjyiwy0=; b=VriqOXfQeVGLUb9XRAGVDPu8NfNtCkkr0xkqL5RgXpD4BYufXkvDMC6SslnNSHthmP t9lhEWE3MeAanLAPguqNNIJzVfuf1ikIohPpsU7g3qhT7RG4WBkTggwQrgjUrqggdJzd fTgwYMJURJWQ4E4iS/X3vK3hW2LC3eCnJl5UYhInSSlf0JbMAbMD71onuIINEwk1nTIi phNqeOdCxH4ljwql3I9cAVDBCmJxWZEcCC72O4dznJSa7YTeGdkn8QlSDFHBhVJdRJUm GWfbjih5CV6nOP4JvK5QDvmk78ql9orcWdpJusDFoNrPri92VO+FUrV7INegxp7shH2+ nFCg== X-Gm-Message-State: APzg51A9deAl20AKtR9h1ukkrfY+qVfcZpXVzQC0kic3nmYi8CgMsNpy HmVUA5ikxwFBuuzap5LtDREqLg== X-Google-Smtp-Source: ANB0VdZNKw7xwQJRr3KXVdoGG27FVqdKJ9dRAXRYzhb0xiZVY02Bdj5lGHgi8LoHCss7g3OQG0BxeA== X-Received: by 2002:a50:a9a4:: with SMTP id n33-v6mr2656458edc.208.1535463588592; Tue, 28 Aug 2018 06:39:48 -0700 (PDT) Received: from localhost ([49.248.200.109]) by smtp.gmail.com with ESMTPSA id r11-v6sm536788edh.32.2018.08.28.06.39.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 28 Aug 2018 06:39:48 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Zhang Rui , Daniel Lezcano , linux-pm@vger.kernel.org Subject: [PATCH v2 08/11] thermal: tsens: Check if the IP is correctly enabled by firmware Date: Tue, 28 Aug 2018 19:08:37 +0530 Message-Id: <35c332750fe1eddfa2eb53750b810256310866bd.1535462942.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SROT registers are initialised by the secure firmware at boot. We don't have write access to the registers. Check if the block is enabled before continuing. Signed-off-by: Amit Kucheria Reviewed-by: Matthias Kaehlcke --- drivers/thermal/qcom/tsens-common.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 0b8a793f15f4..d250b757d1f0 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -12,6 +12,11 @@ #include #include "tsens.h" +/* SROT */ +#define CTRL_OFFSET 0x4 +#define TSENS_EN BIT(0) + +/* TM */ #define STATUS_OFFSET 0x30 #define SN_ADDR_OFFSET 0x4 #define SN_ST_TEMP_MASK 0x3ff @@ -119,6 +124,8 @@ int __init init_common(struct tsens_device *tmdev) { void __iomem *tm_base, *srot_base; struct resource *res; + u32 code; + int ret; struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); if (!op) @@ -151,5 +158,15 @@ int __init init_common(struct tsens_device *tmdev) if (IS_ERR(tmdev->tm_map)) return PTR_ERR(tmdev->tm_map); + if (tmdev->srot_map) { + ret = regmap_read(tmdev->srot_map, CTRL_OFFSET, &code); + if (ret) + return ret; + if (!(code & TSENS_EN)) { + dev_err(tmdev->dev, "tsens device is not enabled\n"); + return -ENODEV; + } + } + return 0; }