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Mon, 1 May 2023 18:03:06 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::f7a7:a561:87e9:5fab]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::f7a7:a561:87e9:5fab%6]) with mapi id 15.20.6340.030; Mon, 1 May 2023 18:03:06 +0000 From: Jason Gunthorpe To: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Marek Szyprowski , Matthias Brugger , Matthew Rosato , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Niklas Schnelle , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang Cc: Lu Baolu , Kevin Tian , Nicolin Chen , Steven Price Subject: [PATCH 05/20] iommu: Allow an IDENTITY domain as the default_domain in ARM32 Date: Mon, 1 May 2023 15:02:49 -0300 Message-Id: <5-v1-21cc72fcfb22+a7a-iommu_all_defdom_jgg@nvidia.com> In-Reply-To: <0-v1-21cc72fcfb22+a7a-iommu_all_defdom_jgg@nvidia.com> References: X-ClientProxiedBy: BL0PR03CA0021.namprd03.prod.outlook.com (2603:10b6:208:2d::34) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|IA1PR12MB6457:EE_ X-MS-Office365-Filtering-Correlation-Id: bff25f15-ab48-4979-66d2-08db4a6e5033 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Y2FBskTv9l9HICdtPjSM7LD5Mke7AJeWYgtsigrlSIcp0LDXavA6svuY8RlgkwgOfEmEgSeb5CYrF9FV9N0ZqEHxWQ6QDIVrN0bDnf6jJMJ9sfLrtm217Dzu5nQRD5Dn2xzshg898cFF0Oa9N5+OL/9BRSYQFcYZOBlAlawAAelqvIo+ErwxRInEZVtktPbCrUQvDTa1J4j+NIHRv85bGK99+ZOkGDLoJOq8azrXcgNOfwtStZeV6Y0yfDrUPcYs35qTniuiY5Y+qkolWC/j44cZsrR1MsYwrOW+t+gn6SezPP9hXv6+KaBDKt/f8Sr4MoWaUNYOT9bDGKpfR+7cCV3xc04wYAWvHQxquN3mtVFpVqHxiROnnI3yWowTt0sxknYB9fXrW7HGxOv91vEcZABNfRWEzkBPZxhw7QFMaOVmUlG8T/Qfm8HfWC0CT0ylgFsA4lANOz/xR/W6ODYvtxh+eNctnfQ+gKwF8enmU6F+Oh4BTf8Rs5pRQ6iP62T0Ho0XxG1MDyS+RVkScSicNodSER+rm4LwkVPHK/PmaqsHOsVrnWGwHbTsMjprz/eo+jif1gXjMOFDw0MkTQb6WPak+lDOjfM54yQgFXrqSCbx/utrUVb2RyLFCieL0tg8or4LVI0UH2BfbBVNttqbgN5Su9NFRzULAgVRQNvc3Q2hYCiPvyJH4LtbXEMwHPrir4eGBaD/obhRk3T0UgWhBZb9RZg0TUtK1RP0d8kFcuUuq6E/3W+HEoVzk/tcauDlcyAGLvDmnbPKyEHd78zn1hz+YahM0AfOZFVdijYOHHsy6WivivfOfUKfU/TVOxqOwYipaHtamf7V0DDXf3z9mdPA9d0J+3WSSERJDoIfCHWdh4URBmh/vw6OxjHjzYIsdL2JVq6jz8JOksDU+dw6fifttedeLOO8W5ZxXDcDZo44WHl+Vrve5nRKK2FLBkhpd7dSUI6iKO9bmyqazZ92N/5o4PbJFo9E0Sms8Jq39X7VzEMAlrPIPR6HfCUuAx5TssK7VTosmf/JF9nXfyhRyJE6yq9dSRE7/Paf8bhbCyJFIvYxcnDhoGgAuX8GHG2RaO1TAOAx1UgQ0wIfQwB4T+wLi8kcio8EHnswi/3QzXDPLETkMq+tX1vfnoGjiZm1u0vytbJV+utXHO+Z6YnrlHkqTjy9df+zuYU9a+xLHG85enAD2hbQC9uH3Zqi0A4fiYC/6bQ/ce+tW2fa+h4sUYp8GVRTJwSXN0d+qkygYGpDvcgZJnI6yg0xGIwglZwSSCLfd9LMZ+2waf6xT1BWmUNhKFtLqLjlPIVHYaShAGmfy68H6puy07sr3xwDMj4PkSSfQQdlMWpHOWyB+sRUISzFNmLw5DXOyehKcKCHQILMBajI2LA8JjNg87rijj4R4SYwgXVcOwq501J/DXfaFiR9CgtU4fHgHqYmkCDrG96nCdOHBJAVtzeKpz3VAcq/IAIw/tTQbZEHHzHEE4axSe6B7z105yHX0FA6Rb7oOr4J9/08QOH04qJVpAdhzZrFIE1ralEy7kFhAUbDgGOtkarP4LJlA5ozRAmjOi98dlltecSxVY7/KasLKbhzrm6H X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: bff25f15-ab48-4979-66d2-08db4a6e5033 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 May 2023 18:03:05.7808 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: DlAHCrj5CKYxsNaomLa5xqT+yDeg/WUK9mmL3PgNFAYF2Xt2sbzgTAyDaW0+C07P X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6457 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Even though dma-iommu.c and CONFIG_ARM_DMA_USE_IOMMU do approximately the same stuff, the way they relate to the IOMMU core is quiet different. dma-iommu.c expects the core code to setup an UNMANAGED domain (of type IOMMU_DOMAIN_DMA) and then configures itself to use that domain. This becomes the default_domain for the group. ARM_DMA_USE_IOMMU does not use the default_domain, instead it directly allocates an UNMANAGED domain and operates it just like an external driver. In this case group->default_domain is NULL. Allow iommu drivers to specify a global static identity_domain and, if present, automatically use this domain as the default_domain when in ARM_DMA_USE_IOMMU mode. This allows drivers that implemented default_domain == NULL as an IDENTITY translation to trivially get a properly labeled non-NULL default_domain on ARM32 configs. With this arrangment when ARM_DMA_USE_IOMMU wants to disconnect from the device the normal detach_domain flow will restore the IDENTITY domain as the default domain. Overall this makes attach_dev() of the IDENTITY domain called in the same places as detach_dev(). This effectively migrates these drivers to default_domain mode. For drivers that support ARM64 they will gain support for the IDENTITY translation mode for the dma_api and behave in a uniform way. Drivers use this by setting ops->identity_domain to a static singleton iommu_domain that implements the identity attach. If the core detects ARM_DMA_USE_IOMMU mode then it automatically attaches the IDENTITY domain during probe. If the driver does not want to support dma_api with translation then it always sets default_domain to the identity domain and even if IOMMU_DMA is turned on it will not allow it to be used. This allows removing the set_platform_dma_ops() from every remaining driver. Add the core support and convert rockchip to use it. Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 13 +++++++++++++ drivers/iommu/rockchip-iommu.c | 19 +------------------ include/linux/iommu.h | 3 +++ 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index ba7f38630665b5..8b9af774de68f1 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1654,6 +1654,16 @@ iommu_group_alloc_default_domain(struct iommu_group *group, int req_type) if (req_type) return __iommu_group_alloc_default_domain(bus, group, req_type); + /* + * ARM32 drivers supporting CONFIG_ARM_DMA_USE_IOMMU can declare an + * identity_domain and it becomes their default domain. Later on + * ARM_DMA_USE_IOMMU will install its UNMANAGED domain. + */ + if (IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) && + bus->iommu_ops->identity_domain) + return __iommu_group_alloc_default_domain( + bus, group, IOMMU_DOMAIN_IDENTITY); + /* The driver gave no guidance on what type to use, try the default */ dom = __iommu_group_alloc_default_domain(bus, group, iommu_def_domain_type); if (dom) @@ -1923,6 +1933,9 @@ static struct iommu_domain *__iommu_domain_alloc(struct bus_type *bus, if (bus == NULL || bus->iommu_ops == NULL) return NULL; + if (type == IOMMU_DOMAIN_IDENTITY && bus->iommu_ops->identity_domain) + return bus->iommu_ops->identity_domain; + domain = bus->iommu_ops->domain_alloc(type); if (!domain) return NULL; diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index ea5a3088bb7e8a..9e1296a856ac4c 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -1017,13 +1017,8 @@ static int rk_iommu_identity_attach(struct iommu_domain *identity_domain, return 0; } -static void rk_iommu_identity_free(struct iommu_domain *domain) -{ -} - static struct iommu_domain_ops rk_identity_ops = { .attach_dev = rk_iommu_identity_attach, - .free = rk_iommu_identity_free, }; static struct iommu_domain rk_identity_domain = { @@ -1031,13 +1026,6 @@ static struct iommu_domain rk_identity_domain = { .ops = &rk_identity_ops, }; -#ifdef CONFIG_ARM -static void rk_iommu_set_platform_dma(struct device *dev) -{ - WARN_ON(rk_iommu_identity_attach(&rk_identity_domain, dev)); -} -#endif - static int rk_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { @@ -1087,9 +1075,6 @@ static struct iommu_domain *rk_iommu_domain_alloc(unsigned type) { struct rk_iommu_domain *rk_domain; - if (type == IOMMU_DOMAIN_IDENTITY) - return &rk_identity_domain; - if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; @@ -1214,13 +1199,11 @@ static int rk_iommu_of_xlate(struct device *dev, } static const struct iommu_ops rk_iommu_ops = { + .identity_domain = &rk_identity_domain, .domain_alloc = rk_iommu_domain_alloc, .probe_device = rk_iommu_probe_device, .release_device = rk_iommu_release_device, .device_group = rk_iommu_device_group, -#ifdef CONFIG_ARM - .set_platform_dma_ops = rk_iommu_set_platform_dma, -#endif .pgsize_bitmap = RK_IOMMU_PGSIZE_BITMAP, .of_xlate = rk_iommu_of_xlate, .default_domain_ops = &(const struct iommu_domain_ops) { diff --git a/include/linux/iommu.h b/include/linux/iommu.h index ddcad3597c177b..427490b5736d40 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -253,6 +253,8 @@ struct iommu_iotlb_gather { * @pgsize_bitmap: bitmap of all possible supported page sizes * @owner: Driver module providing these ops * @default_domain: If not NULL this will always be set as the default domain. + * @identity_domain: An always available, always attachable identity + * translation. */ struct iommu_ops { bool (*capable)(struct device *dev, enum iommu_cap); @@ -287,6 +289,7 @@ struct iommu_ops { unsigned long pgsize_bitmap; struct module *owner; struct iommu_domain *default_domain; + struct iommu_domain *identity_domain; }; /**