@@ -2156,8 +2156,6 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
static bool amd_iommu_capable(enum iommu_cap cap)
{
switch (cap) {
- case IOMMU_CAP_CACHE_COHERENCY:
- return true;
case IOMMU_CAP_INTR_REMAP:
return (irq_remapping_enabled == 1);
case IOMMU_CAP_NOEXEC:
@@ -1986,8 +1986,6 @@ static const struct iommu_flush_ops arm_smmu_flush_ops = {
static bool arm_smmu_capable(enum iommu_cap cap)
{
switch (cap) {
- case IOMMU_CAP_CACHE_COHERENCY:
- return true;
case IOMMU_CAP_NOEXEC:
return true;
default:
@@ -1333,12 +1333,6 @@ static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
static bool arm_smmu_capable(enum iommu_cap cap)
{
switch (cap) {
- case IOMMU_CAP_CACHE_COHERENCY:
- /*
- * Return true here as the SMMU can always send out coherent
- * requests.
- */
- return true;
case IOMMU_CAP_NOEXEC:
return true;
default:
@@ -496,12 +496,6 @@ static phys_addr_t qcom_iommu_iova_to_phys(struct iommu_domain *domain,
static bool qcom_iommu_capable(enum iommu_cap cap)
{
switch (cap) {
- case IOMMU_CAP_CACHE_COHERENCY:
- /*
- * Return true here as the SMMU can always send out coherent
- * requests.
- */
- return true;
case IOMMU_CAP_NOEXEC:
return true;
default:
@@ -177,11 +177,6 @@ static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain,
return iova;
}
-static bool fsl_pamu_capable(enum iommu_cap cap)
-{
- return cap == IOMMU_CAP_CACHE_COHERENCY;
-}
-
static void fsl_pamu_domain_free(struct iommu_domain *domain)
{
struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
@@ -451,7 +446,6 @@ static void fsl_pamu_release_device(struct device *dev)
}
static const struct iommu_ops fsl_pamu_ops = {
- .capable = fsl_pamu_capable,
.domain_alloc = fsl_pamu_domain_alloc,
.probe_device = fsl_pamu_probe_device,
.release_device = fsl_pamu_release_device,
@@ -4557,8 +4557,6 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain)
static bool intel_iommu_capable(enum iommu_cap cap)
{
- if (cap == IOMMU_CAP_CACHE_COHERENCY)
- return domain_update_iommu_snooping(NULL);
if (cap == IOMMU_CAP_INTR_REMAP)
return irq_remapping_enabled == 1;
@@ -42,8 +42,6 @@ static struct s390_domain *to_s390_domain(struct iommu_domain *dom)
static bool s390_iommu_capable(enum iommu_cap cap)
{
switch (cap) {
- case IOMMU_CAP_CACHE_COHERENCY:
- return true;
case IOMMU_CAP_INTR_REMAP:
return true;
default:
@@ -103,8 +103,6 @@ static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
}
enum iommu_cap {
- IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
- transactions */
IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
};
Nothing reads this value anymore, remove it. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> --- drivers/iommu/amd/iommu.c | 2 -- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 -- drivers/iommu/arm/arm-smmu/arm-smmu.c | 6 ------ drivers/iommu/arm/arm-smmu/qcom_iommu.c | 6 ------ drivers/iommu/fsl_pamu_domain.c | 6 ------ drivers/iommu/intel/iommu.c | 2 -- drivers/iommu/s390-iommu.c | 2 -- include/linux/iommu.h | 2 -- 8 files changed, 28 deletions(-)