From patchwork Tue Jul 15 23:38:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 4562501 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5415B9F295 for ; Tue, 15 Jul 2014 23:38:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 848B5201B4 for ; Tue, 15 Jul 2014 23:38:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9EC5220123 for ; Tue, 15 Jul 2014 23:38:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030258AbaGOXi1 (ORCPT ); Tue, 15 Jul 2014 19:38:27 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:49867 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933950AbaGOXiX (ORCPT ); Tue, 15 Jul 2014 19:38:23 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 6B047140A34; Tue, 15 Jul 2014 23:38:22 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 5B0B1140A3A; Tue, 15 Jul 2014 23:38:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from [10.46.167.8] (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E31B4140A34; Tue, 15 Jul 2014 23:38:20 +0000 (UTC) Message-ID: <53C5BB6C.3090006@codeaurora.org> Date: Tue, 15 Jul 2014 16:38:20 -0700 From: Stephen Boyd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130329 Thunderbird/17.0.5 MIME-Version: 1.0 To: Georgi Djakov CC: mturquette@linaro.org, linux@arm.linux.org.uk, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, rdunlap@infradead.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v1] clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support References: <1402591302-12100-1-git-send-email-gdjakov@mm-sol.com> <53C04ED9.6030508@codeaurora.org> In-Reply-To: <53C04ED9.6030508@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 07/11/14 13:53, Stephen Boyd wrote: > On 06/12/14 09:41, Georgi Djakov wrote: >> Add support for the multimedia clock controller found on the APQ8084 >> based platforms. This will allow the multimedia device drivers to >> control their clocks. >> >> Signed-off-by: Georgi Djakov >> --- > I started picking up the qcom clock patches from the list. I see that > this one has a small problem though: > > drivers/clk/qcom/mmcc-apq8084.c:169:10: warning: Initializer entry > defined twice > drivers/clk/qcom/mmcc-apq8084.c:170:10: also defined here > drivers/clk/qcom/mmcc-apq8084.c:185:10: warning: Initializer entry > defined twice > drivers/clk/qcom/mmcc-apq8084.c:187:10: also defined here > drivers/clk/qcom/mmcc-apq8084.c:203:10: warning: Initializer entry > defined twice > drivers/clk/qcom/mmcc-apq8084.c:205:10: also defined here > Ok I've squashed in this fix: diff --git a/drivers/clk/qcom/mmcc-apq8084.c b/drivers/clk/qcom/mmcc-apq8084.c index 9cc956a5e9c9..751eea376a2b 100644 --- a/drivers/clk/qcom/mmcc-apq8084.c +++ b/drivers/clk/qcom/mmcc-apq8084.c @@ -34,12 +34,12 @@ #define P_HDMIPLL 2 #define P_GPLL0 3 #define P_EDPVCO 3 -#define P_MMPLL4 3 -#define P_GPLL1 4 +#define P_MMPLL4 4 #define P_DSI0PLL 4 #define P_DSI0PLL_BYTE 4 #define P_MMPLL2 4 #define P_MMPLL3 4 +#define P_GPLL1 5 #define P_DSI1PLL 5 #define P_DSI1PLL_BYTE 5 #define P_MMSLEEP 6 @@ -166,8 +166,8 @@ static const u8 mmcc_xo_mmpll0_1_4_gpll0_map[] = { [P_XO] = 0, [P_MMPLL0] = 1, [P_MMPLL1] = 2, - [P_MMPLL4] = 3, [P_GPLL0] = 5, + [P_MMPLL4] = 3, }; static const char *mmcc_xo_mmpll0_1_4_gpll0[] = { @@ -183,8 +183,8 @@ static const u8 mmcc_xo_mmpll0_1_4_gpll1_0_map[] = { [P_MMPLL0] = 1, [P_MMPLL1] = 2, [P_MMPLL4] = 3, - [P_GPLL1] = 4, [P_GPLL0] = 5, + [P_GPLL1] = 4, }; static const char *mmcc_xo_mmpll0_1_4_gpll1_0[] = { @@ -201,8 +201,8 @@ static const u8 mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map[] = { [P_MMPLL0] = 1, [P_MMPLL1] = 2, [P_MMPLL4] = 3, - [P_GPLL1] = 4, [P_GPLL0] = 5, + [P_GPLL1] = 4, [P_MMSLEEP] = 6, };