From patchwork Mon Jan 14 10:21:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 10762021 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 22A22139A for ; Mon, 14 Jan 2019 10:22:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 166C9289A5 for ; Mon, 14 Jan 2019 10:22:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 147B628B6E; Mon, 14 Jan 2019 10:22:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_WEB autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40766289A5 for ; Mon, 14 Jan 2019 10:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726856AbfANKWJ (ORCPT ); Mon, 14 Jan 2019 05:22:09 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:36183 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726857AbfANKWJ (ORCPT ); Mon, 14 Jan 2019 05:22:09 -0500 Received: by mail-wr1-f65.google.com with SMTP id u4so22176520wrp.3 for ; Mon, 14 Jan 2019 02:22:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=b84VzS+zt/SYuz8SCYw22/mwhzuXk7yy3r3UAQeofo8=; b=VAT/qx4pWCvf/A4ZUSpHjwVNrketlaH1WIrcCH5h5qxAKVbvo5+z4tCQyRz6+QBNV1 62BquKMDZl+E59cAjzMnECp6/1JWsRyGMyKniWzNpmw4BHRlbPbdP+oFwv7a9gmJlxOZ t0tbaLwdjFhkp5ZLfp6qzIIvvJnch/6QKQ97I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=b84VzS+zt/SYuz8SCYw22/mwhzuXk7yy3r3UAQeofo8=; b=tetojsIKCdRBhYThUhd1ATnZfhdk3ajOfusFz23DN61QnkQ0hXO617QErZzSaoCAoA ZNkuHs8uK5SqEl5IS5M+N4Sf6NlcTwRN2r/DMDUXWdzgtJ6qlNDog4K7VC5zFS8lXkaQ VqNsLFpLxapef/ktTAkoDbcyRkaZeTbKUelUu/ZIc7CgD9odhyAXoSzpzfJ33PBOqQWi fWp75fqa1iIfyfbymwvmLwUWizP5lAYkUDJQuikBd4Oy8ot1Izzro91PV5Tix9vwUT1Y qzJUMGgivoxGbKjkyb8ShmdeCBhMje27PrtkFZPwK+/qkuudqMuWSgNaQ4UY36MLt+D+ Ui9g== X-Gm-Message-State: AJcUukeh7N1HHRww7VrqYaYRmUAKuHj8L2aPt/XGLo+pngIqLzY3JFhl KaYiHBQ0YemKhsop4oB6cd5C2NTSHAk= X-Google-Smtp-Source: ALg8bN6KiDUdohCO+frq/jg2Eo5qIj35wrJDFw9p+lzdW7jsRHanVirm4M7D6QJqcQMPwnPPSj1Etw== X-Received: by 2002:a5d:4586:: with SMTP id p6mr22941742wrq.69.1547461326543; Mon, 14 Jan 2019 02:22:06 -0800 (PST) Received: from localhost ([49.248.81.155]) by smtp.gmail.com with ESMTPSA id h62sm22421356wmf.11.2019.01.14.02.22.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Jan 2019 02:22:05 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, viresh.kumar@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, tdas@codeaurora.org, swboyd@chromium.org, dianders@chromium.org, mka@chromium.org, David Brown , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v2 8/9] arm64: dts: sdm845: wireup the thermal trip points to cpufreq Date: Mon, 14 Jan 2019 15:51:10 +0530 Message-Id: <7f94696460848a6bcfe5aee5ffda7fe556240736.1547458732.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since all cpus in the big and little clusters, respectively, are in the same frequency domain, use all of them for mitigation in the cooling-map. We end up with two cooling devices - one each for the big and little clusters. At the lower trip points we restrict ourselves to throttling only a few OPPs. At higher trip temperatures, allow ourselves to be throttled to any extent. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 177 ++++++++++++++++++++++++--- 1 file changed, 161 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index fb7da678b116..7973e88bdf94 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -99,6 +100,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x0>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -116,6 +118,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x100>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -130,6 +133,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x200>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -144,6 +148,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x300>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -158,6 +163,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x400>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -172,6 +178,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x500>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -186,6 +193,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x600>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -200,6 +208,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x700>; enable-method = "psci"; + #cooling-cells = <2>; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -1719,18 +1728,35 @@ thermal-sensors = <&tsens0 1>; trips { - cpu_alert0: trip0 { + cpu0_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit0: trip1 { + cpu0_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>, + <&CPU1 THERMAL_NO_LIMIT 4>, + <&CPU2 THERMAL_NO_LIMIT 4>, + <&CPU3 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu0_crit>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu1-thermal { @@ -1740,18 +1766,35 @@ thermal-sensors = <&tsens0 2>; trips { - cpu_alert1: trip0 { + cpu1_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit1: trip1 { + cpu1_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>, + <&CPU1 THERMAL_NO_LIMIT 4>, + <&CPU2 THERMAL_NO_LIMIT 4>, + <&CPU3 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu1_crit>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu2-thermal { @@ -1761,18 +1804,35 @@ thermal-sensors = <&tsens0 3>; trips { - cpu_alert2: trip0 { + cpu2_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit2: trip1 { + cpu2_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>, + <&CPU1 THERMAL_NO_LIMIT 4>, + <&CPU2 THERMAL_NO_LIMIT 4>, + <&CPU3 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu2_crit>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu3-thermal { @@ -1782,18 +1842,35 @@ thermal-sensors = <&tsens0 4>; trips { - cpu_alert3: trip0 { + cpu3_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit3: trip1 { + cpu3_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>, + <&CPU1 THERMAL_NO_LIMIT 4>, + <&CPU2 THERMAL_NO_LIMIT 4>, + <&CPU3 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu3_crit>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu4-thermal { @@ -1803,18 +1880,35 @@ thermal-sensors = <&tsens0 7>; trips { - cpu_alert4: trip0 { + cpu4_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit4: trip1 { + cpu4_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu4_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>, + <&CPU5 THERMAL_NO_LIMIT 4>, + <&CPU6 THERMAL_NO_LIMIT 4>, + <&CPU7 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu4_crit>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu5-thermal { @@ -1824,18 +1918,35 @@ thermal-sensors = <&tsens0 8>; trips { - cpu_alert5: trip0 { + cpu5_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit5: trip1 { + cpu5_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu5_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>, + <&CPU5 THERMAL_NO_LIMIT 4>, + <&CPU6 THERMAL_NO_LIMIT 4>, + <&CPU7 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu5_crit>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu6-thermal { @@ -1845,18 +1956,35 @@ thermal-sensors = <&tsens0 9>; trips { - cpu_alert6: trip0 { + cpu6_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit6: trip1 { + cpu6_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu6_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>, + <&CPU5 THERMAL_NO_LIMIT 4>, + <&CPU6 THERMAL_NO_LIMIT 4>, + <&CPU7 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu6_crit>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu7-thermal { @@ -1866,18 +1994,35 @@ thermal-sensors = <&tsens0 10>; trips { - cpu_alert7: trip0 { + cpu7_alert0: trip-point@0 { temperature = <95000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit7: trip1 { + cpu7_crit: cpu_crit@0 { temperature = <110000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu7_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>, + <&CPU5 THERMAL_NO_LIMIT 4>, + <&CPU6 THERMAL_NO_LIMIT 4>, + <&CPU7 THERMAL_NO_LIMIT 4>; + }; + map1 { + trip = <&cpu7_crit>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; };