| Message ID | 893022aecd4ba354adb57bd463206dd93fc19886.1613541226.git.schowdhu@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add driver support for Data Capture and Compare Engine(DCC) for SM8150 | expand |
On 17-02-21, 12:18, Souradeep Chowdhury wrote: > Add the DCC(Data Capture and Compare) device tree node entry along with > the addresses for register regions. This should be last patch.. > > Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index e5bb17b..3198bd3 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -654,6 +654,13 @@ > interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; > }; > > + dcc@010a2000{ no leading zero here and space before { > + compatible = "qcom,sm8150-dcc", "qcom,dcc"; > + reg = <0x0 0x010a2000 0x0 0x1000>, > + <0x0 0x010ad000 0x0 0x3000>; pls align this to preceding line > + reg-names = "dcc-base", "dcc-ram-base"; > + }; > + > ufs_mem_hc: ufshc@1d84000 { > compatible = "qcom,sm8150-ufshc", "qcom,ufshc", > "jedec,ufs-2.0"; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation
Hi, Please find the replies inline. On 2021-02-17 16:33, Vinod Koul wrote: > On 17-02-21, 12:18, Souradeep Chowdhury wrote: >> Add the DCC(Data Capture and Compare) device tree node entry along >> with >> the addresses for register regions. > > This should be last patch.. Ack > >> >> Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi >> b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> index e5bb17b..3198bd3 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> @@ -654,6 +654,13 @@ >> interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + dcc@010a2000{ > > no leading zero here and space before { Ack > >> + compatible = "qcom,sm8150-dcc", "qcom,dcc"; >> + reg = <0x0 0x010a2000 0x0 0x1000>, >> + <0x0 0x010ad000 0x0 0x3000>; > > pls align this to preceding line Ack > >> + reg-names = "dcc-base", "dcc-ram-base"; >> + }; >> + >> ufs_mem_hc: ufshc@1d84000 { >> compatible = "qcom,sm8150-ufshc", "qcom,ufshc", >> "jedec,ufs-2.0"; >> -- >> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a >> member >> of Code Aurora Forum, hosted by The Linux Foundation
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index e5bb17b..3198bd3 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -654,6 +654,13 @@ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; + dcc@010a2000{ + compatible = "qcom,sm8150-dcc", "qcom,dcc"; + reg = <0x0 0x010a2000 0x0 0x1000>, + <0x0 0x010ad000 0x0 0x3000>; + reg-names = "dcc-base", "dcc-ram-base"; + }; + ufs_mem_hc: ufshc@1d84000 { compatible = "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
Add the DCC(Data Capture and Compare) device tree node entry along with the addresses for register regions. Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org> --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)