From patchwork Thu Aug 9 12:32:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 10561367 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E965A157B for ; Thu, 9 Aug 2018 12:33:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D757C2A12C for ; Thu, 9 Aug 2018 12:33:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9D982A507; Thu, 9 Aug 2018 12:33:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F78D2A1A7 for ; Thu, 9 Aug 2018 12:33:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732237AbeHIO6C (ORCPT ); Thu, 9 Aug 2018 10:58:02 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:41553 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732170AbeHIO6C (ORCPT ); Thu, 9 Aug 2018 10:58:02 -0400 Received: by mail-pf1-f193.google.com with SMTP id y10-v6so2785464pfn.8 for ; Thu, 09 Aug 2018 05:33:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=njW6jAZWOPdw7KJ/kbY+W+hKS572y0dkgyYwoknGJBU=; b=kBj3KSKqdrGbKlEZB8ILVyoVK8wPo4sqH0Ttz37olDY7oM8X97IojsYz+ogQTBqhZ4 pv3pbYSRO5b8h6DWWzDe4oFYlcmpQ+YOlq1IK0PKsTs9YjjkOXnFlOi2IFJw0m6Ha8Am w2Z2T16cRauQxtQDRoQjCYmPqzYfWEY+OX/0o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=njW6jAZWOPdw7KJ/kbY+W+hKS572y0dkgyYwoknGJBU=; b=s7FK9AHew2kzU0COro9TflWxd9RKIr4V2oZ34vcJnqdGCJJdrR4CAAXfn6Iq3eEx7Z zasHsNb7fWOZRUItbt+jwZKoIiHLh3Id8Cyb3v6eMlA+AQycgr22HbPMjBIQ/zyI99hz 5cEIhcWDzTH7cLNKWWGKntcIuZ9Rvry1S4zyskzfapn4ihPfEKyQIHsvj9wjHdUaeIYm VufRFK7nweYR3fR27C3JzO36BjFQHRHBnqTBLYoxrb6aLiIPgr4iPEfvvLH2Qw4BMolA 7X4FRaM8XuqS2YD8kZ/4ToDnwtplVXeu72Kz8imDaurPZwRK+fB7pdqnAbmx/eIIiXYT 5PWw== X-Gm-Message-State: AOUpUlHeUy7jdwDLxusvFQbRyAUua7qG8p8Abt9gNN+FJjl09aMzl7HX 2ZIi7WWmwd7+KbBq72AgIEVKkA== X-Google-Smtp-Source: AA+uWPxTt2J9lAQx2dtwd9kW9yJMcUG4IfXqvnmVcjSWEMHpzqLHcGqUcYb1mP1qbb5mdT+CD+43sA== X-Received: by 2002:a62:1449:: with SMTP id 70-v6mr2234037pfu.222.1533818001059; Thu, 09 Aug 2018 05:33:21 -0700 (PDT) Received: from localhost ([45.113.251.134]) by smtp.gmail.com with ESMTPSA id w192-v6sm7818876pfd.74.2018.08.09.05.33.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 05:33:20 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Zhang Rui , linux-pm@vger.kernel.org Subject: [PATCH v1 07/10] thermal: tsens: Check if the IP is correctly enabled by firmware Date: Thu, 9 Aug 2018 18:02:39 +0530 Message-Id: <985ed415774fdac9ac21afad4b4b74f30f6c5068.1533815718.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SROT registers are initialised by the secure firmware at boot. We don't have write access to the registers. Check if the block is enabled before continuing. Signed-off-by: Amit Kucheria Reviewed-by: Matthias Kaehlcke --- drivers/thermal/qcom/tsens-common.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 0b8a793f15f4..d250b757d1f0 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -12,6 +12,11 @@ #include #include "tsens.h" +/* SROT */ +#define CTRL_OFFSET 0x4 +#define TSENS_EN BIT(0) + +/* TM */ #define STATUS_OFFSET 0x30 #define SN_ADDR_OFFSET 0x4 #define SN_ST_TEMP_MASK 0x3ff @@ -119,6 +124,8 @@ int __init init_common(struct tsens_device *tmdev) { void __iomem *tm_base, *srot_base; struct resource *res; + u32 code; + int ret; struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); if (!op) @@ -151,5 +158,15 @@ int __init init_common(struct tsens_device *tmdev) if (IS_ERR(tmdev->tm_map)) return PTR_ERR(tmdev->tm_map); + if (tmdev->srot_map) { + ret = regmap_read(tmdev->srot_map, CTRL_OFFSET, &code); + if (ret) + return ret; + if (!(code & TSENS_EN)) { + dev_err(tmdev->dev, "tsens device is not enabled\n"); + return -ENODEV; + } + } + return 0; }