From patchwork Sat Apr 9 04:17:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12807368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C737C433F5 for ; Sat, 9 Apr 2022 04:17:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240781AbiDIET5 (ORCPT ); Sat, 9 Apr 2022 00:19:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240784AbiDIETt (ORCPT ); Sat, 9 Apr 2022 00:19:49 -0400 X-Greylist: delayed 157798 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 08 Apr 2022 21:17:42 PDT Received: from mail-4319.protonmail.ch (mail-4319.protonmail.ch [185.70.43.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8C3BDA082 for ; Fri, 8 Apr 2022 21:17:42 -0700 (PDT) Date: Sat, 09 Apr 2022 04:17:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail; t=1649477860; bh=ZfIKnNDAxApXki3WuLZmf8+0MPXOOLvWlEKIqT1Ljj8=; h=Date:To:From:Cc:Reply-To:Subject:Message-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID; b=cTZp5G2Ouna2kDcu/68f3ettd4a25+E1GF8ZpuZ5xI8TkavvJc7KO2ruZqqD/mpBy iWeJsBDi/PRIEieqjdW00r8cicPieKZki6gx2dDLtkgokv5fQjNJMyzzJZVpCp05PU 08cAYoyn254Ic5Sf3cLCOCKBrNuJOcQy62qAPPLft0RyXjrBBN797ZWYbnRpSre5Zp KhAP0J4i+6C12lU7TjDhy/K1iLvXNux/OKiANdDSerGuza9vl3zzceRr2CqP1NL7Jl LyTOtP1m5YiMK+is8JVOGanVmYvTgMMS/oTwa5UgeYS5unb5LdJy9XdLBeNMHZIXC8 nTO1YAFfvf0OA== To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Ilia Lin , Viresh Kumar , Nishanth Menon , "Rafael J. Wysocki" From: Yassine Oudjana Cc: Yassine Oudjana , Konrad Dybcio , Dmitry Baryshkov , Loic Poulain , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org Reply-To: Yassine Oudjana Subject: [PATCH v2 5/9] dt-bindings: opp: opp-v2-kryo-cpu: Remove SMEM Message-ID: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom-cpufreq-nvmem no longer uses SMEM. Remove all references to SMEM and change the description and maximum value of opp-supported-hw to reflect the new set of possible values. Signed-off-by: Yassine Oudjana Acked-by: Rob Herring --- .../bindings/opp/opp-v2-kryo-cpu.yaml | 56 +++++++++---------- 1 file changed, 26 insertions(+), 30 deletions(-) -- 2.35.1 diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index 8c2e9ac5f68d..30f7b596d609 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -17,10 +17,10 @@ description: | the CPU frequencies subset and voltage value of each OPP varies based on the silicon variant in use. Qualcomm Technologies, Inc. Process Voltage Scaling Tables - defines the voltage and frequency value based on the msm-id in SMEM - and speedbin blown in the efuse combination. - The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC - to provide the OPP framework with required information (existing HW bitmap). + defines the voltage and frequency value based on the speedbin blown in + the efuse combination. + The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide + the OPP framework with required information (existing HW bitmap). This is used to determine the voltage and frequency value for each OPP of operating-points-v2 table when it is parsed by the OPP framework. @@ -50,15 +50,11 @@ patternProperties: description: | A single 32 bit bitmap value, representing compatible HW. Bitmap: - 0: MSM8996 V3, speedbin 0 - 1: MSM8996 V3, speedbin 1 - 2: MSM8996 V3, speedbin 2 - 3: unused - 4: MSM8996 SG, speedbin 0 - 5: MSM8996 SG, speedbin 1 - 6: MSM8996 SG, speedbin 2 - 7-31: unused - maximum: 0x77 + 0: MSM8996, speedbin 0 + 1: MSM8996, speedbin 1 + 2: MSM8996, speedbin 2 + 3-31: unused + maximum: 0x7 clock-latency-ns: true @@ -184,19 +180,19 @@ examples: opp-307200000 { opp-hz = /bits/ 64 <307200000>; opp-microvolt = <905000 905000 1140000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; - opp-1593600000 { - opp-hz = /bits/ 64 <1593600000>; + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; opp-microvolt = <1140000 905000 1140000>; - opp-supported-hw = <0x71>; + opp-supported-hw = <0x5>; clock-latency-ns = <200000>; }; - opp-2188800000 { - opp-hz = /bits/ 64 <2188800000>; + opp-1593600000 { + opp-hz = /bits/ 64 <1593600000>; opp-microvolt = <1140000 905000 1140000>; - opp-supported-hw = <0x10>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; }; @@ -209,25 +205,25 @@ examples: opp-307200000 { opp-hz = /bits/ 64 <307200000>; opp-microvolt = <905000 905000 1140000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; - opp-1593600000 { - opp-hz = /bits/ 64 <1593600000>; + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; opp-microvolt = <1140000 905000 1140000>; - opp-supported-hw = <0x70>; + opp-supported-hw = <0x6>; clock-latency-ns = <200000>; }; - opp-2150400000 { - opp-hz = /bits/ 64 <2150400000>; + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; opp-microvolt = <1140000 905000 1140000>; - opp-supported-hw = <0x31>; + opp-supported-hw = <0x4>; clock-latency-ns = <200000>; }; - opp-2342400000 { - opp-hz = /bits/ 64 <2342400000>; + opp-2150400000 { + opp-hz = /bits/ 64 <2150400000>; opp-microvolt = <1140000 905000 1140000>; - opp-supported-hw = <0x10>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; };