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回复: [PATCH v6] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem

Message ID TY0PR06MB5053AFE3D6325CA6C0BD4A8B8436A@TY0PR06MB5053.apcprd06.prod.outlook.com (mailing list archive)
State Not Applicable
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Series 回复: [PATCH v6] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem | expand

Commit Message

Duke Xin(辛安文) July 12, 2023, 6:53 a.m. UTC 
Hi Mani

Excuse me, you may have forgotten to review my [PATCH v6] , please help to check it.


辛安文  Duke Xin | Software Department IX Engineer | Quectel Wireless Solutions Co., Ltd. 
            
Mobile: +86-15375456183 | Email : Duke.xin@quectel.com  | Tel: +86-0551-65869386-8632
Website: www.quectel.com  | QQ: 602659072 | Wechat: 15375456183

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总部：上海市闵行区田林路1016号科技绿洲3期（B区）5号楼  200233

-----邮件原件-----
发件人: Duke Xin(辛安文) <duke_xinanwen@163.com> 
发送时间: 2023年6月30日 14:23
收件人: mani@kernel.org; loic.poulain@linaro.org; slark_xiao@163.com
抄送: fabio.porcedda@gmail.com; koen.vandeputte@citymesh.com; song.fc@gmail.com; bhelgaas@google.com; mhi@lists.linux.dev; linux-arm-msm@vger.kernel.org; Jerry Meng(蒙杰) <jerry.meng@quectel.com>; Duke Xin(辛安文) <duke.xin@quectel.com>; Duke Xin(辛安文) <duke_xinanwen@163.com>
主题: [PATCH v6] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem

Add MHI interface definition for RM520 product based on Qualcomm SDX6X chip

Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
---
Changelog

v5 -> v6

* Update commit message to include the changelog and reviewd tag.

v4 -> v5

* Add patch CC to mhi@lists.linux.dev.

v3 -> v4

* Limit character length to 75 characters and adjusted "project" description to "product".

v2 -> v3

* Sorted add rm520 id in mhi_pci_id_table and modify commit message.

v1 -> v2

* Use [modem_quectel_em1xx_config] compatible instead of duplicating the configuration.
---
 drivers/bus/mhi/host/pci_generic.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

 		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
 	{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */
 		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
+	/* RM520N-GL (sdx6x), eSIM */
+	{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004),
+		.driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info },
 	{ PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */
 		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
 	/* T99W175 (sdx55), Both for eSIM and Non-eSIM */
--
2.25.1
diff mbox series

Patch

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 70e37c490150..1e7caa62f114 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -352,6 +352,16 @@  static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
 	.sideband_wake = true,
 };
 
+static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = {
+	.name = "quectel-rm5xx",
+	.edl = "qcom/prog_firehose_sdx6x.elf",
+	.config = &modem_quectel_em1xx_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32,
+	.mru_default = 32768,
+	.sideband_wake = true,
+};
+
 static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
 	MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0),
 	MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), @@ -591,6 +601,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {