From patchwork Mon Oct 21 10:35:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11201849 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D50FE14E5 for ; Mon, 21 Oct 2019 10:36:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B4D5F217D7 for ; Mon, 21 Oct 2019 10:36:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="S9EG7QY/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728374AbfJUKg1 (ORCPT ); Mon, 21 Oct 2019 06:36:27 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:40295 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728361AbfJUKg1 (ORCPT ); Mon, 21 Oct 2019 06:36:27 -0400 Received: by mail-pf1-f194.google.com with SMTP id x127so8170613pfb.7 for ; Mon, 21 Oct 2019 03:36:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=iVqqU2LAVSCsGxONMpzjN5OaSzKTS+PP+RlrbsDHeMo=; b=S9EG7QY/ZgkmqHhRziKbvL3c/VYqOHXyxeTbUYe3phmidMNW6VBcGWA5qYT94oVvwV FcDAXIrZHnwKaZPodf4BPLNtpvyHt05p/WPYzzGomf3ic9a1bgRqcT47c3YQX1kTBzTP TPm2ahWz0pTsWGK1/SUEJ7Eq8+CeuaX+8RSWgQaP+HdnHfbZfdDo2skD2ZdD0OnEMidt mKa3+5D7lLpBUC5WYONM+bjVgGtcN/CH+LHb3+baXgPFR+unyWMICbOgLOWfzCi/Od3z +zswnyNg6Q+4KhQqLJbYtWR5WeASo8JWdwRweB759Abf+83GPYHQHcfBc+UQYlQBDpIa FLoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=iVqqU2LAVSCsGxONMpzjN5OaSzKTS+PP+RlrbsDHeMo=; b=UA3CWetVhsV88mufBItN7o77Ua4sTEUBqY7jGm2yIarUOFl53oBoX5uU3HJQGbPCgI HzYl5cY1BLJIpYveADzTsROY2CfUMRV/PWbySNt/ydPjd5mC/RcI2uzJcr7NVGRA3P0y f1FPIzgHuTNnJd8J/Z3D6nvEVMCAFgK4HXZHZNcLvQeP9mLCwFgBNL1d8ayJuqbhqze2 TQlDosxJok3taihSP2fO3+47qYE+MEy3XQOxHD7yhfLv+xVCwhUHdiwkFLGJ73VzdbDR Unvzoe34d1vBy3Q08c7K2rHKlqVOMfkv3LuU9Iqj5PcDr1AT6gEglMB9iTaPvCzQUoH5 14Iw== X-Gm-Message-State: APjAAAUHdsq5juaskrQzNlc2rvN7jCOduOGAWLW920/ZnNffl1Op3l+V H9V59ejleXDY2YDYccR0WJc/BA== X-Google-Smtp-Source: APXvYqzEHGDZ6oIR4ZkTsgaawzrSiWXv0qd13sPs8zKa+jMYleM9/V8ML0gtBkC0Oq7Pc4bCnCZdKw== X-Received: by 2002:a63:cc4a:: with SMTP id q10mr11017952pgi.221.1571654185644; Mon, 21 Oct 2019 03:36:25 -0700 (PDT) Received: from localhost ([49.248.62.222]) by smtp.gmail.com with ESMTPSA id e192sm15379176pfh.83.2019.10.21.03.36.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 21 Oct 2019 03:36:25 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, agross@kernel.org, masneyb@onstation.org, swboyd@chromium.org, julia.lawall@lip6.fr, Amit Kucheria , Daniel Lezcano , Mark Rutland , Rob Herring , Zhang Rui Cc: devicetree@vger.kernel.org Subject: [PATCH v6 12/15] arm: dts: msm8974: thermal: Add interrupt support Date: Mon, 21 Oct 2019 16:05:31 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Register upper-lower interrupt for the tsens controller. Signed-off-by: Amit Kucheria Tested-by: Brian Masney --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 33c534370fd5c..c1a3a7d7161cd 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -531,6 +531,8 @@ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #qcom,sensors = <11>; + interrupts = ; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; };