diff mbox series

[v6,4/4] arm64: dts: ipq6018: add pwm node

Message ID c68ea254275022d03fc493db682aae476ff74abd.1626948070.git.baruch@tkos.co.il (mailing list archive)
State Changes Requested
Headers show
Series [v6,1/4] arm64: dts: ipq6018: correct TCSR block area | expand

Commit Message

Baruch Siach July 22, 2021, 10:01 a.m. UTC
Describe the PWM block on IPQ6018.

The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
&pwm as child of &tcsr.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
v6:

  Make the PWM node child of TCSR (Rob Herring)

  Add assigned-clocks/assigned-clock-rates (Uwe Kleine-K├Ânig)

v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs

v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
---
 arch/arm64/boot/dts/qcom/ipq6018.dtsi | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 6bb262757cd9..2a95a24175ad 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -271,8 +271,19 @@  tcsr_mutex_regs: syscon@1905000 {
 		};
 
 		tcsr: syscon@1937000 {
-			compatible = "syscon";
+			compatible = "syscon", "simple-mfd";
 			reg = <0x0 0x01937000 0x0 0x21000>;
+
+			pwm: pwm {
+				#pwm-cells = <2>;
+				compatible = "qcom,ipq6018-pwm";
+				offset = <0xa010>;
+				clocks = <&gcc GCC_ADSS_PWM_CLK>;
+				clock-names = "core";
+				assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
+				assigned-clock-rates = <100000000>;
+				status = "disabled";
+			};
 		};
 
 		blsp_dma: dma-controller@7884000 {