diff mbox series

arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch

Message ID cae52ea6-e86a-4b86-af06-01a8a93d2ca0@mailbox.org (mailing list archive)
State New
Headers show
Series arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch | expand

Commit Message

Anthony Ruhier Dec. 18, 2024, 7:01 p.m. UTC 
Add the lid switch for the Lenovo Yoga Slim 7x.

Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga
Slim 7x this pin seems to be bridged with the pin 71. By default, the
pin 71 is set as output-high, which blocks any event on pin 92.

This patch sets the pin 71 as output-disable and sets the LID switch on
pin 92. This is aligned with how they're configured on Windows:
     GPIO  71 | 0xf147000 | in | func0 | hi | pull up   | 16 mA | 
ctl=0x000001c3 io=0x00000003
     GPIO  92 | 0xf15c000 | in | func0 | lo | no pull   |  2 mA | 
ctl=0x00000000 io=0x00000001

Signed-off-by: Anthony Ruhier <aruhier@mailbox.org>
---
  .../dts/qcom/x1e80100-lenovo-yoga-slim7x.dts  | 38 +++++++++++++++++++
  1 file changed, 38 insertions(+)

  		pins = "gpio67";
  		function = "gpio";
--
2.47.1

Comments

Maya Matuszczyk Dec. 18, 2024, 9:36 p.m. UTC | #1 
Nice to see it finally working!

Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com>

śr., 18 gru 2024 o 20:02 Anthony Ruhier <aruhier@mailbox.org> napisał(a):
>
> Add the lid switch for the Lenovo Yoga Slim 7x.
>
> Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga
> Slim 7x this pin seems to be bridged with the pin 71. By default, the
> pin 71 is set as output-high, which blocks any event on pin 92.
>
> This patch sets the pin 71 as output-disable and sets the LID switch on
> pin 92. This is aligned with how they're configured on Windows:
>      GPIO  71 | 0xf147000 | in | func0 | hi | pull up   | 16 mA |
> ctl=0x000001c3 io=0x00000003
>      GPIO  92 | 0xf15c000 | in | func0 | lo | no pull   |  2 mA |
> ctl=0x00000000 io=0x00000001
>
> Signed-off-by: Anthony Ruhier <aruhier@mailbox.org>
> ---
>   .../dts/qcom/x1e80100-lenovo-yoga-slim7x.dts  | 38 +++++++++++++++++++
>   1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
> b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
> index ca5a808f2c7d..311202aa9015 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
> @@ -6,6 +6,7 @@
>   /dts-v1/;
>
>   #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/gpio-keys.h>
>   #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>
>   #include "x1e80100.dtsi"
> @@ -19,6 +20,21 @@ aliases {
>                 serial0 = &uart21;
>         };
>
> +       gpio-keys {
> +               compatible = "gpio-keys";
> +
> +               pinctrl-0 = <&hall_int_n_default>;
> +               pinctrl-names = "default";
> +
> +               switch-lid {
> +                       gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
> +                       linux,input-type = <EV_SW>;
> +                       linux,code = <SW_LID>;
> +                       wakeup-source;
> +                       wakeup-event-action = <EV_ACT_DEASSERTED>;
> +               };
> +       };
> +
>         chosen {
>                 stdout-path = "serial0:115200n8";
>         };
> @@ -811,6 +827,28 @@ edp_reg_en: edp-reg-en-state {
>                 bias-disable;
>         };
>
> +       hall_int_n_default: hall-int-n-state {
> +               lid-n-pins {
> +                       pins = "gpio92";
> +                       function = "gpio";
> +                       bias-disable;
> +               };
> +
> +               /*
> +                * Pins 71 and 92 seem to be bridged together (pin 71 and 92 show the
> same
> +                * events). By default, pin 71 is set as output-high, which blocks any
> +                * event on pin 92. Output-disable on pin 71 is necessary to get
> events on
> +                * pin 92.
> +                * The purpose of pin 71 is not yet known; lid-pull is a supposition.
> +                */
> +               lid-pull-n-pins {
> +                       pins = "gpio71";
> +                       function = "gpio";
> +                       bias-pull-up;
> +                       output-disable;
> +               };
> +       };
> +
>         kybd_default: kybd-default-state {
>                 pins = "gpio67";
>                 function = "gpio";
> --
> 2.47.1
>
Anthony Ruhier Dec. 19, 2024, 10:34 a.m. UTC | #2 
Thank you Maya!
I'm sorry, I realized that the patch format is wrong due to a 
misconfiguration of my mail client. Tell me if I should send a v2 of 
this patch fixing it.

On 12/18/24 10:36 PM, Maya Matuszczyk wrote:
> Nice to see it finally working!
> 
> Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com>
> 
> śr., 18 gru 2024 o 20:02 Anthony Ruhier <aruhier@mailbox.org> napisał(a):
>>
>> Add the lid switch for the Lenovo Yoga Slim 7x.
>>
>> Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga
>> Slim 7x this pin seems to be bridged with the pin 71. By default, the
>> pin 71 is set as output-high, which blocks any event on pin 92.
>>
>> This patch sets the pin 71 as output-disable and sets the LID switch on
>> pin 92. This is aligned with how they're configured on Windows:
>>       GPIO  71 | 0xf147000 | in | func0 | hi | pull up   | 16 mA |
>> ctl=0x000001c3 io=0x00000003
>>       GPIO  92 | 0xf15c000 | in | func0 | lo | no pull   |  2 mA |
>> ctl=0x00000000 io=0x00000001
>>
>> Signed-off-by: Anthony Ruhier <aruhier@mailbox.org>
>> ---
>>    .../dts/qcom/x1e80100-lenovo-yoga-slim7x.dts  | 38 +++++++++++++++++++
>>    1 file changed, 38 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
>> b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
>> index ca5a808f2c7d..311202aa9015 100644
>> --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
>> +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
>> @@ -6,6 +6,7 @@
>>    /dts-v1/;
>>
>>    #include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/gpio-keys.h>
>>    #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>>
>>    #include "x1e80100.dtsi"
>> @@ -19,6 +20,21 @@ aliases {
>>                  serial0 = &uart21;
>>          };
>>
>> +       gpio-keys {
>> +               compatible = "gpio-keys";
>> +
>> +               pinctrl-0 = <&hall_int_n_default>;
>> +               pinctrl-names = "default";
>> +
>> +               switch-lid {
>> +                       gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
>> +                       linux,input-type = <EV_SW>;
>> +                       linux,code = <SW_LID>;
>> +                       wakeup-source;
>> +                       wakeup-event-action = <EV_ACT_DEASSERTED>;
>> +               };
>> +       };
>> +
>>          chosen {
>>                  stdout-path = "serial0:115200n8";
>>          };
>> @@ -811,6 +827,28 @@ edp_reg_en: edp-reg-en-state {
>>                  bias-disable;
>>          };
>>
>> +       hall_int_n_default: hall-int-n-state {
>> +               lid-n-pins {
>> +                       pins = "gpio92";
>> +                       function = "gpio";
>> +                       bias-disable;
>> +               };
>> +
>> +               /*
>> +                * Pins 71 and 92 seem to be bridged together (pin 71 and 92 show the
>> same
>> +                * events). By default, pin 71 is set as output-high, which blocks any
>> +                * event on pin 92. Output-disable on pin 71 is necessary to get
>> events on
>> +                * pin 92.
>> +                * The purpose of pin 71 is not yet known; lid-pull is a supposition.
>> +                */
>> +               lid-pull-n-pins {
>> +                       pins = "gpio71";
>> +                       function = "gpio";
>> +                       bias-pull-up;
>> +                       output-disable;
>> +               };
>> +       };
>> +
>>          kybd_default: kybd-default-state {
>>                  pins = "gpio67";
>>                  function = "gpio";
>> --
>> 2.47.1
>>
Konrad Dybcio Dec. 19, 2024, 3:13 p.m. UTC | #3 
On 19.12.2024 11:34 AM, Anthony Ruhier wrote:
> Thank you Maya!
> I'm sorry, I realized that the patch format is wrong due to a misconfiguration of my mail client. Tell me if I should send a v2 of this patch fixing it.

Git throws an error here when applying, please resend

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts 
b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
index ca5a808f2c7d..311202aa9015 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
@@ -6,6 +6,7 @@ 
  /dts-v1/;

  #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/gpio-keys.h>
  #include <dt-bindings/regulator/qcom,rpmh-regulator.h>

  #include "x1e80100.dtsi"
@@ -19,6 +20,21 @@  aliases {
  		serial0 = &uart21;
  	};

+	gpio-keys {
+		compatible = "gpio-keys";
+
+		pinctrl-0 = <&hall_int_n_default>;
+		pinctrl-names = "default";
+
+		switch-lid {
+			gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
+			linux,input-type = <EV_SW>;
+			linux,code = <SW_LID>;
+			wakeup-source;
+			wakeup-event-action = <EV_ACT_DEASSERTED>;
+		};
+	};
+
  	chosen {
  		stdout-path = "serial0:115200n8";
  	};
@@ -811,6 +827,28 @@  edp_reg_en: edp-reg-en-state {
  		bias-disable;
  	};

+	hall_int_n_default: hall-int-n-state {
+		lid-n-pins {
+			pins = "gpio92";
+			function = "gpio";
+			bias-disable;
+		};
+
+		/*
+		 * Pins 71 and 92 seem to be bridged together (pin 71 and 92 show the 
same
+		 * events). By default, pin 71 is set as output-high, which blocks any
+		 * event on pin 92. Output-disable on pin 71 is necessary to get 
events on
+		 * pin 92.
+		 * The purpose of pin 71 is not yet known; lid-pull is a supposition.
+		 */
+		lid-pull-n-pins {
+			pins = "gpio71";
+			function = "gpio";
+			bias-pull-up;
+			output-disable;
+		};
+	};
+
  	kybd_default: kybd-default-state {