| Message ID | d01f560abed221b536b27bfaa42a530257642974.1533815718.git.amit.kucheria@linaro.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Delegated to: | Andy Gross |
| Headers | show |
| Series | Another round of tsens cleanups | expand |
On Thu, Aug 09, 2018 at 06:02:33PM +0530, Amit Kucheria wrote: > We've earlier added support to split the register address space into TM > and SROT regions. > > Split up the regmap address space into two for the remaining platforms that > have a similar register layout and make corresponding changes to the > get_temp_common() function used by these platforms. > > Since tsens-common.c/init_common() currently only registers one address > space, the order is important (TM before SROT). This is OK since the code > doesn't really use the SROT functionality yet. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- > drivers/thermal/qcom/tsens-common.c | 5 +++-- > 3 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > index d9019a49b292..3c4b81c29798 100644 > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > @@ -427,11 +427,13 @@ > }; > }; > > - tsens: thermal-sensor@fc4a8000 { > + tsens: thermal-sensor@fc4a9000 { > compatible = "qcom,msm8974-tsens"; > - reg = <0xfc4a8000 0x2000>; > + reg = <0xfc4a9000 0x1000>, /* TM */ > + <0xfc4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > nvmem-cell-names = "calib", "calib_backup"; > + #qcom,sensors = <11>; nit: adding the number of sensors isn't directly related and probably should be in a separate patch. Not important enough to re-spin just for this though ;-) > #thermal-sensor-cells = <1>; > }; > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index cc1040eacdf5..abf84df5a7bc 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -774,11 +774,13 @@ > }; > }; > > - tsens: thermal-sensor@4a8000 { > + tsens: thermal-sensor@4a9000 { > compatible = "qcom,msm8916-tsens"; > - reg = <0x4a8000 0x2000>; > + reg = <0x4a9000 0x1000>, /* TM */ > + <0x4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > nvmem-cell-names = "calib", "calib_sel"; > + #qcom,sensors = <5>; ditto > #thermal-sensor-cells = <1>; > }; > > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c > index 6207d8d92351..478739543bbc 100644 > --- a/drivers/thermal/qcom/tsens-common.c > +++ b/drivers/thermal/qcom/tsens-common.c > @@ -21,7 +21,7 @@ > #include <linux/regmap.h> > #include "tsens.h" > > -#define S0_ST_ADDR 0x1030 > +#define STATUS_OFFSET 0x30 > #define SN_ADDR_OFFSET 0x4 > #define SN_ST_TEMP_MASK 0x3ff > #define CAL_DEGC_PT1 30 > @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) > unsigned int status_reg; > int last_temp = 0, ret; > > - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; > + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; > ret = regmap_read(tmdev->map, status_reg, &code); > + > if (ret) > return ret; > last_temp = code & SN_ST_TEMP_MASK; Reviewed-by: Matthias Kaehlcke <mka@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Aug 10, 2018 at 12:41 AM Matthias Kaehlcke <mka@chromium.org> wrote: > > On Thu, Aug 09, 2018 at 06:02:33PM +0530, Amit Kucheria wrote: > > We've earlier added support to split the register address space into TM > > and SROT regions. > > > > Split up the regmap address space into two for the remaining platforms that > > have a similar register layout and make corresponding changes to the > > get_temp_common() function used by these platforms. > > > > Since tsens-common.c/init_common() currently only registers one address > > space, the order is important (TM before SROT). This is OK since the code > > doesn't really use the SROT functionality yet. > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > --- > > arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- > > arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- > > drivers/thermal/qcom/tsens-common.c | 5 +++-- > > 3 files changed, 11 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > > index d9019a49b292..3c4b81c29798 100644 > > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > > @@ -427,11 +427,13 @@ > > }; > > }; > > > > - tsens: thermal-sensor@fc4a8000 { > > + tsens: thermal-sensor@fc4a9000 { > > compatible = "qcom,msm8974-tsens"; > > - reg = <0xfc4a8000 0x2000>; > > + reg = <0xfc4a9000 0x1000>, /* TM */ > > + <0xfc4a8000 0x1000>; /* SROT */ > > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > > nvmem-cell-names = "calib", "calib_backup"; > > + #qcom,sensors = <11>; > > nit: adding the number of sensors isn't directly related and probably > should be in a separate patch. Not important enough to re-spin just > for this though ;-) Hi Matthias, Sometimes the urge to avoid frivolous patches takes over too strongly. :-) I'll split it out in a respin. Thanks for the quick review of the series. Regards, Amit > > #thermal-sensor-cells = <1>; > > }; > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > index cc1040eacdf5..abf84df5a7bc 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > @@ -774,11 +774,13 @@ > > }; > > }; > > > > - tsens: thermal-sensor@4a8000 { > > + tsens: thermal-sensor@4a9000 { > > compatible = "qcom,msm8916-tsens"; > > - reg = <0x4a8000 0x2000>; > > + reg = <0x4a9000 0x1000>, /* TM */ > > + <0x4a8000 0x1000>; /* SROT */ > > nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > > nvmem-cell-names = "calib", "calib_sel"; > > + #qcom,sensors = <5>; > > ditto > > > #thermal-sensor-cells = <1>; > > }; > > > > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c > > index 6207d8d92351..478739543bbc 100644 > > --- a/drivers/thermal/qcom/tsens-common.c > > +++ b/drivers/thermal/qcom/tsens-common.c > > @@ -21,7 +21,7 @@ > > #include <linux/regmap.h> > > #include "tsens.h" > > > > -#define S0_ST_ADDR 0x1030 > > +#define STATUS_OFFSET 0x30 > > #define SN_ADDR_OFFSET 0x4 > > #define SN_ST_TEMP_MASK 0x3ff > > #define CAL_DEGC_PT1 30 > > @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) > > unsigned int status_reg; > > int last_temp = 0, ret; > > > > - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; > > + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; > > ret = regmap_read(tmdev->map, status_reg, &code); > > + > > if (ret) > > return ret; > > last_temp = code & SN_ST_TEMP_MASK; > > Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
hello, On Thu, Aug 09, 2018 at 06:02:33PM +0530, Amit Kucheria wrote: > We've earlier added support to split the register address space into TM > and SROT regions. > > Split up the regmap address space into two for the remaining platforms that > have a similar register layout and make corresponding changes to the > get_temp_common() function used by these platforms. > > Since tsens-common.c/init_common() currently only registers one address > space, the order is important (TM before SROT). This is OK since the code > doesn't really use the SROT functionality yet. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- > drivers/thermal/qcom/tsens-common.c | 5 +++-- Can you please resend this with two separate patches, one with the driver changes another for the dts(i) changes. Just that I prefer taking only the driver changes once accepting the dts changes. Makes merging easier to avoid conflicts when sending pulls. Thanks. > 3 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > index d9019a49b292..3c4b81c29798 100644 > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > @@ -427,11 +427,13 @@ > }; > }; > > - tsens: thermal-sensor@fc4a8000 { > + tsens: thermal-sensor@fc4a9000 { > compatible = "qcom,msm8974-tsens"; > - reg = <0xfc4a8000 0x2000>; > + reg = <0xfc4a9000 0x1000>, /* TM */ > + <0xfc4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > nvmem-cell-names = "calib", "calib_backup"; > + #qcom,sensors = <11>; > #thermal-sensor-cells = <1>; > }; > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index cc1040eacdf5..abf84df5a7bc 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -774,11 +774,13 @@ > }; > }; > > - tsens: thermal-sensor@4a8000 { > + tsens: thermal-sensor@4a9000 { > compatible = "qcom,msm8916-tsens"; > - reg = <0x4a8000 0x2000>; > + reg = <0x4a9000 0x1000>, /* TM */ > + <0x4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > nvmem-cell-names = "calib", "calib_sel"; > + #qcom,sensors = <5>; > #thermal-sensor-cells = <1>; > }; > > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c > index 6207d8d92351..478739543bbc 100644 > --- a/drivers/thermal/qcom/tsens-common.c > +++ b/drivers/thermal/qcom/tsens-common.c > @@ -21,7 +21,7 @@ > #include <linux/regmap.h> > #include "tsens.h" > > -#define S0_ST_ADDR 0x1030 > +#define STATUS_OFFSET 0x30 > #define SN_ADDR_OFFSET 0x4 > #define SN_ST_TEMP_MASK 0x3ff > #define CAL_DEGC_PT1 30 > @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) > unsigned int status_reg; > int last_temp = 0, ret; > > - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; > + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; > ret = regmap_read(tmdev->map, status_reg, &code); > + > if (ret) > return ret; > last_temp = code & SN_ST_TEMP_MASK; > -- > 2.17.1 >
On Thu, Aug 09, 2018 at 06:02:33PM +0530, Amit Kucheria wrote: > We've earlier added support to split the register address space into TM > and SROT regions. > > Split up the regmap address space into two for the remaining platforms that > have a similar register layout and make corresponding changes to the > get_temp_common() function used by these platforms. > > Since tsens-common.c/init_common() currently only registers one address > space, the order is important (TM before SROT). This is OK since the code > doesn't really use the SROT functionality yet. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- > drivers/thermal/qcom/tsens-common.c | 5 +++-- > 3 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > index d9019a49b292..3c4b81c29798 100644 > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > @@ -427,11 +427,13 @@ > }; > }; > > - tsens: thermal-sensor@fc4a8000 { > + tsens: thermal-sensor@fc4a9000 { > compatible = "qcom,msm8974-tsens"; > - reg = <0xfc4a8000 0x2000>; > + reg = <0xfc4a9000 0x1000>, /* TM */ > + <0xfc4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > nvmem-cell-names = "calib", "calib_backup"; > + #qcom,sensors = <11>; > #thermal-sensor-cells = <1>; > }; > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index cc1040eacdf5..abf84df5a7bc 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -774,11 +774,13 @@ > }; > }; > > - tsens: thermal-sensor@4a8000 { > + tsens: thermal-sensor@4a9000 { > compatible = "qcom,msm8916-tsens"; > - reg = <0x4a8000 0x2000>; > + reg = <0x4a9000 0x1000>, /* TM */ > + <0x4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > nvmem-cell-names = "calib", "calib_sel"; > + #qcom,sensors = <5>; > #thermal-sensor-cells = <1>; Looking closer to this, I fail to remember the reasoning why #qcom,sensors property was needed. > }; > > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c > index 6207d8d92351..478739543bbc 100644 > --- a/drivers/thermal/qcom/tsens-common.c > +++ b/drivers/thermal/qcom/tsens-common.c > @@ -21,7 +21,7 @@ > #include <linux/regmap.h> > #include "tsens.h" > > -#define S0_ST_ADDR 0x1030 > +#define STATUS_OFFSET 0x30 > #define SN_ADDR_OFFSET 0x4 > #define SN_ST_TEMP_MASK 0x3ff > #define CAL_DEGC_PT1 30 > @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) > unsigned int status_reg; > int last_temp = 0, ret; > > - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; > + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; > ret = regmap_read(tmdev->map, status_reg, &code); > + > if (ret) > return ret; > last_temp = code & SN_ST_TEMP_MASK; > -- > 2.17.1 >
On Sat, Aug 25, 2018 at 4:58 AM Eduardo Valentin <edubezval@gmail.com> wrote: > > On Thu, Aug 09, 2018 at 06:02:33PM +0530, Amit Kucheria wrote: > > We've earlier added support to split the register address space into TM > > and SROT regions. > > > > Split up the regmap address space into two for the remaining platforms that > > have a similar register layout and make corresponding changes to the > > get_temp_common() function used by these platforms. > > > > Since tsens-common.c/init_common() currently only registers one address > > space, the order is important (TM before SROT). This is OK since the code > > doesn't really use the SROT functionality yet. > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > --- > > arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- > > arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- > > drivers/thermal/qcom/tsens-common.c | 5 +++-- > > 3 files changed, 11 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > > index d9019a49b292..3c4b81c29798 100644 > > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > > @@ -427,11 +427,13 @@ > > }; > > }; > > > > - tsens: thermal-sensor@fc4a8000 { > > + tsens: thermal-sensor@fc4a9000 { > > compatible = "qcom,msm8974-tsens"; > > - reg = <0xfc4a8000 0x2000>; > > + reg = <0xfc4a9000 0x1000>, /* TM */ > > + <0xfc4a8000 0x1000>; /* SROT */ > > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > > nvmem-cell-names = "calib", "calib_backup"; > > + #qcom,sensors = <11>; > > #thermal-sensor-cells = <1>; > > }; > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > index cc1040eacdf5..abf84df5a7bc 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > @@ -774,11 +774,13 @@ > > }; > > }; > > > > - tsens: thermal-sensor@4a8000 { > > + tsens: thermal-sensor@4a9000 { > > compatible = "qcom,msm8916-tsens"; > > - reg = <0x4a8000 0x2000>; > > + reg = <0x4a9000 0x1000>, /* TM */ > > + <0x4a8000 0x1000>; /* SROT */ > > nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > > nvmem-cell-names = "calib", "calib_sel"; > > + #qcom,sensors = <5>; > > #thermal-sensor-cells = <1>; > > Looking closer to this, I fail to remember the reasoning why > #qcom,sensors property was needed. It is necessary for platforms that have multiple TSENS blocks. This then allows us to specify the number of connected sensors per block. See commit 6d7c70d1cd65 ("thermal: qcom: tsens: Allow number of sensors to come from DT") for details. As requested by Matthias, I'm moving this bit to its own patch in v2. Regards, Amit
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index d9019a49b292..3c4b81c29798 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -427,11 +427,13 @@ }; }; - tsens: thermal-sensor@fc4a8000 { + tsens: thermal-sensor@fc4a9000 { compatible = "qcom,msm8974-tsens"; - reg = <0xfc4a8000 0x2000>; + reg = <0xfc4a9000 0x1000>, /* TM */ + <0xfc4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; + #qcom,sensors = <11>; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index cc1040eacdf5..abf84df5a7bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -774,11 +774,13 @@ }; }; - tsens: thermal-sensor@4a8000 { + tsens: thermal-sensor@4a9000 { compatible = "qcom,msm8916-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; nvmem-cell-names = "calib", "calib_sel"; + #qcom,sensors = <5>; #thermal-sensor-cells = <1>; }; diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 6207d8d92351..478739543bbc 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -21,7 +21,7 @@ #include <linux/regmap.h> #include "tsens.h" -#define S0_ST_ADDR 0x1030 +#define STATUS_OFFSET 0x30 #define SN_ADDR_OFFSET 0x4 #define SN_ST_TEMP_MASK 0x3ff #define CAL_DEGC_PT1 30 @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) unsigned int status_reg; int last_temp = 0, ret; - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; ret = regmap_read(tmdev->map, status_reg, &code); + if (ret) return ret; last_temp = code & SN_ST_TEMP_MASK;
We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for the remaining platforms that have a similar register layout and make corresponding changes to the get_temp_common() function used by these platforms. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> --- arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- drivers/thermal/qcom/tsens-common.c | 5 +++-- 3 files changed, 11 insertions(+), 6 deletions(-)