From patchwork Tue Nov 14 21:16:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bart Van Assche X-Patchwork-Id: 13455976 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C78E2FC27 for ; Tue, 14 Nov 2023 21:20:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from mail-pj1-f41.google.com (mail-pj1-f41.google.com [209.85.216.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF051C4; Tue, 14 Nov 2023 13:19:59 -0800 (PST) Received: by mail-pj1-f41.google.com with SMTP id 98e67ed59e1d1-280109daaaaso4684259a91.3; Tue, 14 Nov 2023 13:19:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699996799; x=1700601599; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CHfCUfy3YZ4/cZAo2CvvXHiRDCpV7olj515/DJuvegE=; b=rRlT/MvxlezjqGIb3d1/efNBY6eYI2dNm5kjrHSAFBuEHaiZH+yixQRCauomLk3aIi Kqfyp/NeneyjOs8hpsCNSYCPSS2XkXMZXs3vHGAHXXT9dfrF+38VKllddSX96LKlOfa2 eXQUUYXGYMNiOvb6YJqehYbGK5PB/kgx/NMQJuxnCmgz0uo62W3sRIIfMG8jWxIff/Uq ExEZiD31g78HUD11CXM6IQG7SoxWhKRDWc0K/xrJj+bx4LZqgEAWCskgbBvLvVMVESXR xIElbWuW5vKICvhT5hJzsIgaWV1iL2/fMjp/QJlMmg8pecv097EkjpJXJZ4VlbPClubg nNsQ== X-Gm-Message-State: AOJu0YwJs/TDVxk0daRRGk65LEUgrizVNDMs6EMNuENMRx89cmml1O7Z jivu2EDnetBW3F4NoCtww3U= X-Google-Smtp-Source: AGHT+IEJBomTrjeTK+QrNA7hMvMr2TseY8i5KPDUt0E9uVm0VByT8BNeUtGQZAmGYdoT84j4yd/2Vw== X-Received: by 2002:a17:90b:4b82:b0:271:7cd6:165d with SMTP id lr2-20020a17090b4b8200b002717cd6165dmr9367182pjb.26.1699996799288; Tue, 14 Nov 2023 13:19:59 -0800 (PST) Received: from bvanassche-linux.mtv.corp.google.com ([2620:0:1000:8411:2278:ad72:cefb:4d49]) by smtp.gmail.com with ESMTPSA id ix7-20020a170902f80700b001c71ec1866fsm6169288plb.258.2023.11.14.13.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 13:19:58 -0800 (PST) From: Bart Van Assche To: "Martin K . Petersen" Cc: linux-scsi@vger.kernel.org, linux-block@vger.kernel.org, Jens Axboe , Christoph Hellwig , Bart Van Assche , "Bao D . Nguyen" , Can Guo , Avri Altman , "James E.J. Bottomley" , Stanley Chu , Manivannan Sadhasivam , Asutosh Das , Peter Wang , Bean Huo , Arthur Simchaev Subject: [PATCH v15 18/19] scsi: ufs: Forbid auto-hibernation without I/O scheduler Date: Tue, 14 Nov 2023 13:16:26 -0800 Message-ID: <20231114211804.1449162-19-bvanassche@acm.org> X-Mailer: git-send-email 2.43.0.rc0.421.g78406f8d94-goog In-Reply-To: <20231114211804.1449162-1-bvanassche@acm.org> References: <20231114211804.1449162-1-bvanassche@acm.org> Precedence: bulk X-Mailing-List: linux-block@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 UFSHCI controllers in legacy mode do not preserve the write order if auto-hibernation is enabled. If the write order is not preserved, an I/O scheduler is required to serialize zoned writes. Hence do not allow auto-hibernation to be enabled without I/O scheduler if a zoned logical unit is present and if the controller is operating in legacy mode. This patch has been tested with the following shell script: show_ah8() { echo -n "auto_hibern8: " adb shell "cat /sys/devices/platform/13200000.ufs/auto_hibern8" } set_ah8() { local rc adb shell "echo $1 > /sys/devices/platform/13200000.ufs/auto_hibern8" rc=$? show_ah8 return $rc } set_iosched() { adb shell "echo $1 >/sys/class/block/$zoned_bdev/queue/scheduler && echo -n 'I/O scheduler: ' && cat /sys/class/block/sde/queue/scheduler" } adb root zoned_bdev=$(adb shell grep -lvw 0 /sys/class/block/sd*/queue/chunk_sectors |& sed 's|/sys/class/block/||g;s|/queue/chunk_sectors||g') [ -n "$zoned_bdev" ] show_ah8 set_ah8 0 set_iosched none if set_ah8 150000; then echo "Error: enabled AH8 without I/O scheduler" fi set_iosched mq-deadline set_ah8 150000 Reviewed-by: Bao D. Nguyen Reviewed-by: Can Guo Cc: Martin K. Petersen Cc: Avri Altman Signed-off-by: Bart Van Assche --- drivers/ufs/core/ufshcd.c | 60 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 73cdf9917e02..732509289165 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -4401,6 +4401,30 @@ int ufshcd_uic_hibern8_exit(struct ufs_hba *hba) } EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit); +static int ufshcd_update_preserves_write_order(struct ufs_hba *hba, + bool preserves_write_order) +{ + struct scsi_device *sdev; + + if (!preserves_write_order) { + shost_for_each_device(sdev, hba->host) { + struct request_queue *q = sdev->request_queue; + + /* + * Refuse to enable auto-hibernation if no I/O scheduler + * is present. This code does not check whether the + * attached I/O scheduler serializes zoned writes + * (ELEVATOR_F_ZBD_SEQ_WRITE) because this cannot be + * checked from outside the block layer core. + */ + if (blk_queue_is_zoned(q) && !q->elevator) + return -EPERM; + } + } + + return 0; +} + static void ufshcd_configure_auto_hibern8(struct ufs_hba *hba) { if (!ufshcd_is_auto_hibern8_supported(hba)) @@ -4409,13 +4433,42 @@ static void ufshcd_configure_auto_hibern8(struct ufs_hba *hba) ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER); } +/** + * ufshcd_auto_hibern8_update() - Modify the auto-hibernation control register + * @hba: per-adapter instance + * @ahit: New auto-hibernate settings. Includes the scale and the value of the + * auto-hibernation timer. See also the UFSHCI_AHIBERN8_TIMER_MASK and + * UFSHCI_AHIBERN8_SCALE_MASK constants. + * + * Notes: + * - UFSHCI controllers do not preserve the command order in legacy mode + * if auto-hibernation is enabled. If the command order is not preserved, an + * I/O scheduler that serializes zoned writes (mq-deadline) is required if a + * zoned logical unit is present. Enabling auto-hibernation without attaching + * the mq-deadline scheduler first may cause unaligned write errors for the + * zoned logical unit if a zoned logical unit is present. + * - Calls of this function must be serialized. + */ int ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit) { const u32 cur_ahit = READ_ONCE(hba->ahit); + bool prev_state, new_state; + int ret; if (!ufshcd_is_auto_hibern8_supported(hba) || cur_ahit == ahit) return 0; + prev_state = FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, cur_ahit); + new_state = FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, ahit); + + if (!is_mcq_enabled(hba) && !prev_state && new_state) { + /* + * Auto-hibernation will be enabled for legacy UFSHCI mode. + */ + ret = ufshcd_update_preserves_write_order(hba, false); + if (ret) + return ret; + } WRITE_ONCE(hba->ahit, ahit); if (!pm_runtime_suspended(&hba->ufs_device_wlun->sdev_gendev)) { ufshcd_rpm_get_sync(hba); @@ -4424,6 +4477,13 @@ int ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit) ufshcd_release(hba); ufshcd_rpm_put_sync(hba); } + if (!is_mcq_enabled(hba) && prev_state && !new_state) { + /* + * Auto-hibernation has been disabled. + */ + ret = ufshcd_update_preserves_write_order(hba, true); + WARN_ON_ONCE(ret); + } return 0; }