From patchwork Sat Jul 21 18:14:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 10539063 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC791A6C2 for ; Sun, 22 Jul 2018 00:57:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7199E28AE6 for ; Sat, 21 Jul 2018 18:15:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 612C128B21; Sat, 21 Jul 2018 18:15:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8B15928AE6 for ; Sat, 21 Jul 2018 18:15:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727854AbeGUTIw (ORCPT ); Sat, 21 Jul 2018 15:08:52 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:54116 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727458AbeGUTIw (ORCPT ); Sat, 21 Jul 2018 15:08:52 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9F7B56021A; Sat, 21 Jul 2018 18:15:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532196915; bh=qWB+6F+5j4ioDrNIoZqItS1A/kRvlZVocpg8Abk/Gsw=; h=From:To:Cc:Subject:Date:From; b=ltQgFUQzH9RW9Pp5VQZdek5T8beg9/JLKMIDym5f59/3DzbyWrnQjr+XIbgJ0w1dt i57lBy05bYBE7EuNRfmWBmwK26sDKLg/r/wNN9NWc+qxIOWEYzMEVJC1yuP5wwI9Vw FGVzolkofCW1+Kk4IYO1B74OdjcOYV80Kt+RTTzY= Received: from tdas-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tdas@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 675166021A; Sat, 21 Jul 2018 18:15:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532196914; bh=qWB+6F+5j4ioDrNIoZqItS1A/kRvlZVocpg8Abk/Gsw=; h=From:To:Cc:Subject:Date:From; b=Tt0Tt/lhkFzewTCmUh9j1WDxjYyGYWZpCva4ePl3BkNNFC0ePCjBNPsVS7sj273ou th8YnDZfNW/E4EgNrt38yv3BGeRQr+vEbEnusRbBauD6BjjRK3O8NBA8g25hRPS2vI 7oYTfakdsjK9PctdS5+f+BEcRahEidPaDUxHNI5Y= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 675166021A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: Stephen Boyd , Michael Turquette Cc: Andy Gross , David Brown , Rajendra Nayak , Amit Nischal , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, grahamr@qti.qualcomm.com, Taniya Das Subject: [RFC PATCH 0/4] clk: qcom: Add support to vote to genpd Date: Sat, 21 Jul 2018 23:44:58 +0530 Message-Id: <1532196902-28570-1-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A clock controller could be connected to single or multiple power domains. Add support for powerdomain_class which would help associate these power domains to the RCGs and PLLs in the clock controller. Map the domain and the corresponding frequencies to the clock(RCG/PLL). The clock frequency request from a consumer would be mapped to the corresponding performance corner, aggregated at the clock driver and would be vote/unvoted to the genpd framework for the desired performance state. This series add an example of power domain class for sdm845 RCG/PLLs and the corresponding frequency mappings. This depends on power domain drivers of SDM845 https://lkml.org/lkml/2018/6/27/7. Taniya Das (4): clk: qcom: Add support to request power domain state clk: qcom: Initialize the power domain class for each clock clk: qcom: Add prepare/unprepare clock ops for PLL/RCG clk: qcom: sdm845: Add Power Domain to RCGs and PLL arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-alpha-pll.c | 52 ++++++++-- drivers/clk/qcom/clk-pd.c | 193 +++++++++++++++++++++++++++++++++++ drivers/clk/qcom/clk-pd.h | 55 ++++++++++ drivers/clk/qcom/clk-rcg2.c | 61 +++++++++-- drivers/clk/qcom/clk-regmap.h | 5 + drivers/clk/qcom/common.c | 17 ++- drivers/clk/qcom/gcc-sdm845.c | 83 ++++++++++++--- 9 files changed, 427 insertions(+), 42 deletions(-) create mode 100644 drivers/clk/qcom/clk-pd.c create mode 100644 drivers/clk/qcom/clk-pd.h --- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation. -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html