From patchwork Fri Feb 21 10:12:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 11396015 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D864B924 for ; Fri, 21 Feb 2020 10:12:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ADD4224670 for ; Fri, 21 Feb 2020 10:12:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="EvAkE69k" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728644AbgBUKMS (ORCPT ); Fri, 21 Feb 2020 05:12:18 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:5479 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728637AbgBUKMS (ORCPT ); Fri, 21 Feb 2020 05:12:18 -0500 X-UUID: 8580c188ca1c4683b143bcc1bb34a3f7-20200221 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=BeBQELOP6/jjvwXwwsxHmMAHpAErb5cdnorUWLKW/vk=; b=EvAkE69k9ORyuGLCOCSCtO3GLU8O/vr2jcg0An8MzKKbGHglS6cx+6Uz8Imz/lAyTPZN0qPgNRZzwSJWlAF+XzTkJWmf6SYu8r2o9dV1ftx2ikZzB41dtEMHyxpQDffPJndV3nzH3qTHo6iFVDr6/zOSvEqtQWDNhxjqnQetgQA=; X-UUID: 8580c188ca1c4683b143bcc1bb34a3f7-20200221 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 618939546; Fri, 21 Feb 2020 18:12:13 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 21 Feb 2020 18:11:30 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 21 Feb 2020 18:11:53 +0800 From: Macpaul Lin To: Rob Herring , Mark Rutland , Matthias Brugger , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , mtk01761 , Fabien Parent , Weiyi Lu , Mars Cheng , Sean Wang , Macpaul Lin , Owen Chen , Chunfeng Yun , Evan Green , Yong Wu , Joerg Roedel , Shawn Guo , Marc Zyngier , Ryder Lee , , , , , CC: Mediatek WSD Upstream , CC Hwang , Loda Chou Subject: [PATCH v8 0/4] Add basic SoC support for mt6765 Date: Fri, 21 Feb 2020 18:12:05 +0800 Message-ID: <1582279929-11535-1-git-send-email-macpaul.lin@mediatek.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-TM-SNTS-SMTP: DA3DDA379D4AE327C2F9F2B41F4294B902761E1F5B0BC745B996EC5B115CB3212000:8 X-MTK: N Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This patch adds basic SoC support for Mediatek's new 8-core SoC, MT6765, which is mainly for smartphone application. Changes in V8: 1. Origin V7 patchset: https://patchwork.kernel.org/cover/11370105/ Split origin V7 patchset into 2 patchset, keep remain patches #2, #5, #6, and #7 in the same order as this V8 patchset. [v7,2/7] dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC [v7,5/7] soc: mediatek: add MT6765 scpsys and subdomain support [v7,6/7] arm64: dts: mediatek: add mt6765 support [v7,7/7] arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks Changes in V7: 1. Adapt V6's patchset to latest kernel tree 5.5-rc1. Origin V6 patchset: https://patchwork.kernel.org/cover/11041963/ 2. Correct 2 clock-controller type in documentation: mipi0 and venc_gcon. [v7 1/7] dt-bindings: clock: mediatek: document clk bindings 3. Remove V6's patch 03 because it has been taken into 5.5-next-soc [v6, 03/08] dt-bindings: mediatek: add MT6765 power dt-bindings 3. Update Reviewed-by: Rob Herring for [v6, 04/08] clk: mediatek: add mt6765 clock IDs --> [v7, 03/07] clk: mediatek: add mt6765 clock IDs 4. Update SPDX tag for [v6, 05/08] clk: mediatek: Add MT6765 clock support --> [v7, 04/07] clk: mediatek: Add MT6765 clock support Changes in V6: 1. Adapt V5's patchset to latest kernel tree. Origin V5 patchset. https://lore.kernel.org/patchwork/cover/963612/ 2. Due to clk's common code has been submit by other platform, this patch set will have dependencies with the following patchsets as the following orders. 2.a. [v8,00/21] MT8183 IOMMU SUPPORT https://patchwork.kernel.org/cover/11023585/ 2.b. [v11,0/6] Add basic node support for Mediatek MT8183 SoC https://patchwork.kernel.org/cover/10962385/ 2.c. [v6,00/14] Mediatek MT8183 scpsys support https://patchwork.kernel.org/cover/11005751/ 3. Correct power related patches into dt-binding patches. 4. Re-order V5's 4/11, 6/11, and 7/11 due clk common code change and make dependencies in order. 5. Update some commit message in clk related patches. Changes in V5: 1. add clk support Changes in V4: 1. add gic's settings in reg properties 2. remove some patches about dt-bindings since GKH already took them Changes in V3: 1. split dt-binding document patchs 2. fix mt6765.dtsi warnings with W=12 3. remove uncessary PPI affinity for timer 4. add gicc base for gic dt node Changes in V2: 1. fix clk properties in uart dts node 2. fix typo in submit title 3. add simple-bus in mt6765.dtsi 4. use correct SPDX license format Mars Cheng (3): dt-bindings: mediatek: Add smi dts binding for Mediatek MT6765 SoC soc: mediatek: add MT6765 scpsys and subdomain support arm64: dts: mediatek: add mt6765 support Owen Chen (1): arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks .../memory-controllers/mediatek,smi-common.txt | 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 +++ arch/arm64/boot/dts/mediatek/mt6765.dtsi | 253 ++++++++++++++++++++ arch/arm64/configs/defconfig | 6 + drivers/soc/mediatek/mtk-scpsys.c | 130 ++++++++++ 6 files changed, 424 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi