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(envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 307378200; Thu, 22 Oct 2020 20:37:46 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Oct 2020 20:37:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Oct 2020 20:37:44 +0800 From: Weiyi Lu To: Matthias Brugger , Rob Herring , Stephen Boyd , Nicolas Boichat CC: , , , , , Weiyi Lu Subject: [PATCH v4 00/34] Mediatek MT8192 clock support Date: Thu, 22 Oct 2020 20:36:53 +0800 Message-ID: <1603370247-30437-1-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org changes since v3: - add critical clocks - split large patches into small ones changes since v2: - update and split dt-binding documents by functionalities - add error checking in probe() function - fix incorrect clock relation and add critical clocks - update license identifier and minor fix of coding style changes since v1: - fix asymmetrical control of PLL - have en_mask used as divider enable mask on all MediaTek SoC Weiyi Lu (34): dt-bindings: ARM: Mediatek: Add new document bindings of camsys raw controller dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c wrapper controller dt-bindings: ARM: Mediatek: Add new document bindings of mdpsys controller dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller dt-bindings: ARM: Mediatek: Add new document bindings of scp adsp controller dt-bindings: ARM: Mediatek: Add new document bindings of vdecsys soc controller dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock controllers clk: mediatek: Add dt-bindings of MT8192 clocks clk: mediatek: Fix asymmetrical PLL enable and disable control clk: mediatek: Add configurable enable control to mtk_pll_data clk: mediatek: Add MT8192 basic clocks support clk: mediatek: Add MT8192 audio clock support clk: mediatek: Add MT8192 camsys clock support clk: mediatek: Add MT8192 camsys rawa clock support clk: mediatek: Add MT8192 camsys rawb clock support clk: mediatek: Add MT8192 camsys rawc clock support clk: mediatek: Add MT8192 imgsys clock support clk: mediatek: Add MT8192 imgsys2 clock support clk: mediatek: Add MT8192 imp i2c wrapper c clock support clk: mediatek: Add MT8192 imp i2c wrapper e clock support clk: mediatek: Add MT8192 imp i2c wrapper n clock support clk: mediatek: Add MT8192 imp i2c wrapper s clock support clk: mediatek: Add MT8192 imp i2c wrapper w clock support clk: mediatek: Add MT8192 imp i2c wrapper ws clock support clk: mediatek: Add MT8192 ipesys clock support clk: mediatek: Add MT8192 mdpsys clock support clk: mediatek: Add MT8192 mfgcfg clock support clk: mediatek: Add MT8192 mmsys clock support clk: mediatek: Add MT8192 msdc top clock support clk: mediatek: Add MT8192 msdc clock support clk: mediatek: Add MT8192 scp adsp clock support clk: mediatek: Add MT8192 vdecsys clock support clk: mediatek: Add MT8192 vdecsys soc clock support clk: mediatek: Add MT8192 vencsys clock support .../arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../arm/mediatek/mediatek,camsys-raw.yaml | 54 + .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 + .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 78 + .../arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + .../arm/mediatek/mediatek,mdpsys.yaml | 38 + .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,msdc.yaml | 46 + .../arm/mediatek/mediatek,pericfg.yaml | 1 + .../arm/mediatek/mediatek,scp-adsp.yaml | 38 + .../arm/mediatek/mediatek,topckgen.txt | 1 + .../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 + .../arm/mediatek/mediatek,vdecsys.txt | 1 + .../arm/mediatek/mediatek,vencsys.txt | 1 + drivers/clk/mediatek/Kconfig | 146 ++ drivers/clk/mediatek/Makefile | 24 + drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++ drivers/clk/mediatek/clk-mt8192-cam.c | 72 + drivers/clk/mediatek/clk-mt8192-cam_rawa.c | 59 + drivers/clk/mediatek/clk-mt8192-cam_rawb.c | 59 + drivers/clk/mediatek/clk-mt8192-cam_rawc.c | 59 + drivers/clk/mediatek/clk-mt8192-img.c | 60 + drivers/clk/mediatek/clk-mt8192-img2.c | 62 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_c.c | 62 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_e.c | 59 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_n.c | 60 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_s.c | 61 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_w.c | 59 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c | 61 + drivers/clk/mediatek/clk-mt8192-ipe.c | 64 + drivers/clk/mediatek/clk-mt8192-mdp.c | 89 ++ drivers/clk/mediatek/clk-mt8192-mfg.c | 57 + drivers/clk/mediatek/clk-mt8192-mm.c | 108 ++ drivers/clk/mediatek/clk-mt8192-msdc.c | 57 + drivers/clk/mediatek/clk-mt8192-msdc_top.c | 71 + drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 57 + drivers/clk/mediatek/clk-mt8192-vdec.c | 82 + drivers/clk/mediatek/clk-mt8192-vdec_soc.c | 82 + drivers/clk/mediatek/clk-mt8192-venc.c | 60 + drivers/clk/mediatek/clk-mt8192.c | 1350 +++++++++++++++++ drivers/clk/mediatek/clk-mtk.h | 2 + drivers/clk/mediatek/clk-mux.h | 15 + drivers/clk/mediatek/clk-pll.c | 31 +- include/dt-bindings/clock/mt8192-clk.h | 592 ++++++++ 48 files changed, 4036 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml create mode 100644 drivers/clk/mediatek/clk-mt8192-aud.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawa.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawb.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-img.c create mode 100644 drivers/clk/mediatek/clk-mt8192-img2.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_c.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_e.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_n.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_s.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_w.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c create mode 100644 drivers/clk/mediatek/clk-mt8192-ipe.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mdp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mfg.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc_top.c create mode 100644 drivers/clk/mediatek/clk-mt8192-scp_adsp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec_soc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8192.c create mode 100644 include/dt-bindings/clock/mt8192-clk.h