From patchwork Mon Nov 9 02:13:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiyi Lu X-Patchwork-Id: 11890287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MIME_BASE64_TEXT,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9881DC4742C for ; Mon, 9 Nov 2020 02:13:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3D0D7221FB for ; Mon, 9 Nov 2020 02:13:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Y1Yb2fKe" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729099AbgKICNk (ORCPT ); Sun, 8 Nov 2020 21:13:40 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:38108 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729039AbgKICNk (ORCPT ); Sun, 8 Nov 2020 21:13:40 -0500 X-UUID: 5cd194328ba34224b95f365358a9468a-20201109 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=QKYXBw3xj3qXNRxnbKjODyTeTt27HBcwJuuhlnsqFP0=; b=Y1Yb2fKerY5SlFSeLmmT5ahXGORU9ZhEkFk4AA8kWzMhUyz4SPyzzoTPpki594gQ1Fe1fi5yN+KcIMLzBAXYI+TfqY6SuW/IhZpjhCyBscNA0NsRTBd1l0mgZzM42gk/um3SAT29CzZbzV9x7IU6YiHNIwmNVNfgEJ5M5ZOSIPE=; X-UUID: 5cd194328ba34224b95f365358a9468a-20201109 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1590705612; Mon, 09 Nov 2020 10:13:37 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 9 Nov 2020 10:13:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 9 Nov 2020 10:13:30 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Nicolas Boichat CC: , , , , , Weiyi Lu Subject: [PATCH v2 00/13] Clean up the pll_en_bit from en_mask on all the MediaTek clock drivers Date: Mon, 9 Nov 2020 10:13:15 +0800 Message-ID: <1604888008-30555-1-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This series is based on v5.10-rc1 and [v5,07/24] clk: mediatek: Fix asymmetrical PLL enable and disable control[1] in Mediatek MT8192 clock support series [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1604887429-29445-8-git-send-email-weiyi.lu@mediatek.com/ change since v1: - add patch for MT8167 Weiyi Lu (13): clk: mediatek: Clean up the pll_en_bit from en_mask on MT2701 clk: mediatek: Clean up the pll_en_bit from en_mask on MT2712 clk: mediatek: Clean up the pll_en_bit from en_mask on MT6765 clk: mediatek: Clean up the pll_en_bit from en_mask on MT6779 clk: mediatek: Clean up the pll_en_bit from en_mask on MT6797 clk: mediatek: Clean up the pll_en_bit from en_mask on MT7622 clk: mediatek: Clean up the pll_en_bit from en_mask on MT7629 clk: mediatek: Clean up the pll_en_bit from en_mask on MT8135 clk: mediatek: Clean up the pll_en_bit from en_mask on MT8167 clk: mediatek: Clean up the pll_en_bit from en_mask on MT8173 clk: mediatek: Clean up the pll_en_bit from en_mask on MT8183 clk: mediatek: Clean up the pll_en_bit from en_mask on MT8516 clk: mediatek: use en_mask as a pure div_en_mask drivers/clk/mediatek/clk-mt2701.c | 26 +++++++++++++------------- drivers/clk/mediatek/clk-mt2712.c | 30 +++++++++++++++--------------- drivers/clk/mediatek/clk-mt6765.c | 20 ++++++++++---------- drivers/clk/mediatek/clk-mt6779.c | 24 ++++++++++++------------ drivers/clk/mediatek/clk-mt6797.c | 20 ++++++++++---------- drivers/clk/mediatek/clk-mt7622.c | 18 +++++++++--------- drivers/clk/mediatek/clk-mt7629.c | 12 ++++++------ drivers/clk/mediatek/clk-mt8135.c | 20 ++++++++++---------- drivers/clk/mediatek/clk-mt8167.c | 16 ++++++++-------- drivers/clk/mediatek/clk-mt8173.c | 28 ++++++++++++++-------------- drivers/clk/mediatek/clk-mt8183.c | 22 +++++++++++----------- drivers/clk/mediatek/clk-mt8516.c | 12 ++++++------ drivers/clk/mediatek/clk-pll.c | 12 ++++-------- 13 files changed, 128 insertions(+), 132 deletions(-)