From patchwork Thu Apr 15 05:52:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Flora Fu X-Patchwork-Id: 12204491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BB54C43460 for ; Thu, 15 Apr 2021 05:52:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E28DE6142B for ; Thu, 15 Apr 2021 05:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230202AbhDOFxJ (ORCPT ); Thu, 15 Apr 2021 01:53:09 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:59329 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230005AbhDOFxI (ORCPT ); Thu, 15 Apr 2021 01:53:08 -0400 X-UUID: 4109fb04b007482dabfbafcd9211e28f-20210415 X-UUID: 4109fb04b007482dabfbafcd9211e28f-20210415 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1239353362; Thu, 15 Apr 2021 13:52:42 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 15 Apr 2021 13:52:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 15 Apr 2021 13:52:41 +0800 From: Flora Fu To: Rob Herring , Matthias Brugger , Michael Turquette , Stephen Boyd CC: Liam Girdwood , Mark Brown , Flora Fu , Pi-Cheng Chen , Chiawen Lee , Chun-Jie Chen , , , , , , Subject: [PATCH v2 0/7] Add Support for MediaTek MT8192 APU Power Date: Thu, 15 Apr 2021 13:52:33 +0800 Message-ID: <1618465960-3013-1-git-send-email-flora.fu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-TM-SNTS-SMTP: 55F8CAFCAE7B42F408EA77F2DA84EEC679C4F95FB05FECA62F3CF3DEC733908C2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The MediaTek AI Processing Unit (APU) is a proprietary hardware in the SoC to support AI operations. The series is to create apusys in the SoC folder for developing the related drivers. Add the apu clocks, basic apu nodes and the power domain to provide the power controller of APU subsystem. This series is based on MT8192 clock[1] and PMIC[2] patches. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=454523 [2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=458733 Change notes: v1->v2: 1) update expression "s/_/-/" in dt-bindings documents. 2) drop apu power domain header file for mt8192. v1: https://patchwork.kernel.org/project/linux-mediatek/list/?series=461999 Flora Fu (7): dt-bindings: clock: Add MT8192 APU clock bindings clk: mediatek: mt8192: Add APU clocks support dt-bindings: arm: mediatek: Add new document bindings for APU dt-bindings: soc: mediatek: apusys: Add new document for APU power domain soc: mediatek: apu: Add apusys and add apu power domain driver arm64: dts: mt8192: Add APU node arm64: dts: mt8192: Add APU power domain node .../arm/mediatek/mediatek,apusys.yaml | 56 ++ .../soc/mediatek/mediatek,apu-pm.yaml | 145 +++++ arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 7 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 45 ++ drivers/clk/mediatek/clk-mt8192.c | 91 +++ drivers/soc/mediatek/Kconfig | 10 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/apusys/Makefile | 2 + drivers/soc/mediatek/apusys/mtk-apu-pm.c | 612 ++++++++++++++++++ include/dt-bindings/clock/mt8192-clk.h | 14 +- 10 files changed, 981 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pm.yaml create mode 100644 drivers/soc/mediatek/apusys/Makefile create mode 100644 drivers/soc/mediatek/apusys/mtk-apu-pm.c