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[v4,0/5] Misc Ingenic patches.

Message ID 1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com (mailing list archive)
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Series Misc Ingenic patches. | expand

Message

Zhou Yanjie June 26, 2021, 6:18 a.m. UTC
Some misc patches that don't really have any relation
between themselves.

周琰杰 (Zhou Yanjie) (5):
  MIPS: X1830: Respect cell count of common properties.
  dt-bindings: clock: Add documentation for MAC PHY control bindings.
  MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
  MIPS: CI20: Reduce clocksource to 750 kHz.
  MIPS: CI20: Add second percpu timer for SMP.

 .../devicetree/bindings/clock/ingenic,cgu.yaml     |  2 ++
 arch/mips/boot/dts/ingenic/ci20.dts                | 24 +++++++++++++---------
 arch/mips/boot/dts/ingenic/x1000.dtsi              |  7 +++++++
 arch/mips/boot/dts/ingenic/x1830.dtsi              | 16 ++++++++++-----
 4 files changed, 34 insertions(+), 15 deletions(-)

Comments

Thomas Bogendoerfer June 30, 2021, 12:37 p.m. UTC | #1
On Sat, Jun 26, 2021 at 02:18:36PM +0800, 周琰杰 (Zhou Yanjie) wrote:
> Some misc patches that don't really have any relation
> between themselves.
> 
> 周琰杰 (Zhou Yanjie) (5):
>   MIPS: X1830: Respect cell count of common properties.
>   dt-bindings: clock: Add documentation for MAC PHY control bindings.
>   MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
>   MIPS: CI20: Reduce clocksource to 750 kHz.
>   MIPS: CI20: Add second percpu timer for SMP.
> 
>  .../devicetree/bindings/clock/ingenic,cgu.yaml     |  2 ++
>  arch/mips/boot/dts/ingenic/ci20.dts                | 24 +++++++++++++---------
>  arch/mips/boot/dts/ingenic/x1000.dtsi              |  7 +++++++
>  arch/mips/boot/dts/ingenic/x1830.dtsi              | 16 ++++++++++-----
>  4 files changed, 34 insertions(+), 15 deletions(-)

applied to mips-next.

Thomas.