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[v4,0/2] Add one clock gate for i.MX95 HSIO block

Message ID 1725525535-22924-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
Headers show
Series Add one clock gate for i.MX95 HSIO block | expand

Message

Richard Zhu Sept. 5, 2024, 8:38 a.m. UTC
CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
enable/disable.
Add one clock gate for i.MX95 HSIO block to support PCIe REF clock
out gate.

v4 changes:
- Correct typo in commit message of #2 patch.

v3 changes:
- Squash first two dt-binding patches into one.
- Add Krzysztof's Acked-by tag, and Frank's Reviewed-by tag.

v2 changes:
- Correct the compatible entries by alphabetical order
- Include all necessary To/Cc entried reminderd by Krzysztof.
Thanks.

[PATCH v4 1/2] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible
[PATCH v4 2/2] clk: imx95-blk-ctl: Add one clock gate for HSIO block

Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml |  5 +++--
drivers/clk/imx/clk-imx95-blk-ctl.c                            | 20 ++++++++++++++++++++
2 files changed, 23 insertions(+), 2 deletions(-)