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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 86sm31914838pfk.157.2019.02.18.22.03.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Feb 2019 22:03:48 -0800 (PST) From: Bjorn Andersson Cc: Andy Gross , David Brown , Bjorn Helgaas , Rob Herring , Mark Rutland , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Lorenzo Pieralisi , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v2 0/7] QCS404 PCIe PHY and controller Date: Mon, 18 Feb 2019 22:04:00 -0800 Message-Id: <20190219060407.15263-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This series adds support for the PCIe controller and PHY found in the Qualcomm platform QCS404. Bjorn Andersson (7): clk: gcc-qcs404: Add PCIe resets dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY phy: qcom: Add Qualcomm PCIe2 PHY driver PCI: qcom: Use clk_bulk API for 2.4.0 controllers dt-bindings: PCI: qcom: Add QCS404 to the binding PCI: qcom: Add QCS404 PCIe controller support arm64: dts: qcom: qcs404: Add PCIe related nodes .../devicetree/bindings/pci/qcom,pcie.txt | 25 +- .../bindings/phy/qcom-pcie2-phy.txt | 40 +++ arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 25 ++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 67 ++++ drivers/clk/qcom/gcc-qcs404.c | 7 + drivers/pci/controller/dwc/pcie-qcom.c | 108 +++--- drivers/phy/qualcomm/Kconfig | 8 + drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-pcie2.c | 331 ++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-qcs404.h | 7 + 10 files changed, 558 insertions(+), 61 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt create mode 100644 drivers/phy/qualcomm/phy-qcom-pcie2.c