From patchwork Fri Mar 20 17:02:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 11449909 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 550ED913 for ; Fri, 20 Mar 2020 17:02:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 338222076F for ; Fri, 20 Mar 2020 17:02:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1584723778; bh=WTT25i45HTyzP5L/oP+xV6T/9doLnhTh1Zo72y+d5Bc=; h=From:To:Cc:Subject:Date:List-ID:From; b=UJMXAAiBZfXPQM0dL1SgjAAJy4mdCwZCb0z4q04q1DdxPtUx27FJWN8MQyh2zZUT6 RYNstuatMPlM/yvxH2gR6/hnVA8D3hPZ2QH45x1ED4QeM51Ld7264ivaQkF0qnv6C5 U/9eUYAJhjJ/UxrVn2h6XBA3VXzHfBFzy0XQ/sVI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727269AbgCTRC5 (ORCPT ); Fri, 20 Mar 2020 13:02:57 -0400 Received: from mail.kernel.org ([198.145.29.99]:40510 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726953AbgCTRC5 (ORCPT ); Fri, 20 Mar 2020 13:02:57 -0400 Received: from localhost.localdomain (cpe-70-114-128-244.austin.res.rr.com [70.114.128.244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5599220782; Fri, 20 Mar 2020 17:02:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1584723777; bh=WTT25i45HTyzP5L/oP+xV6T/9doLnhTh1Zo72y+d5Bc=; h=From:To:Cc:Subject:Date:From; b=t/e/9+WjbjI/MvJWjwlaAA2vMxIYhq8oB2TWAodc21n8A9FIZQTT6DO/zbXXMVnBF HaRuGPxjjqWl0INZRKtP4zOO2BtsT7Kq9jtZ58l8h207DrQ/rFPNrqvJ63M9UYlgdY EfeNKwI4xu/ATjCus26559ysXTy9pKptauhKeRWQ= From: Dinh Nguyen To: linux-clk@vger.kernel.org Cc: dinguyen@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com Subject: [PATCHv4 0/5] clk: agilex: add clock driver Date: Fri, 20 Mar 2020 12:02:06 -0500 Message-Id: <20200320170212.21523-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi, This is version 4 of the patchset to add a clock driver to the Agilex platform. The change from v3 is fixing the build of the dt-bindings file. Thanks, Dinh Nguyen (5): clk: socfpga: stratix10: use new parent data scheme clk: socfpga: remove clk_ops enable/disable methods clk: socfpga: add const to _ops data structures dt-bindings: documentation: add clock bindings information for Agilex clk: socfpga: agilex: add clock driver for the Agilex platform .../bindings/clock/intel,agilex.yaml | 36 ++ drivers/clk/Makefile | 3 +- drivers/clk/socfpga/Makefile | 2 + drivers/clk/socfpga/clk-agilex.c | 454 ++++++++++++++++++ drivers/clk/socfpga/clk-gate-s10.c | 5 +- drivers/clk/socfpga/clk-periph-s10.c | 10 +- drivers/clk/socfpga/clk-pll-a10.c | 4 +- drivers/clk/socfpga/clk-pll-s10.c | 78 ++- drivers/clk/socfpga/clk-pll.c | 4 +- drivers/clk/socfpga/clk-s10.c | 160 ++++-- drivers/clk/socfpga/stratix10-clk.h | 10 +- include/dt-bindings/clock/agilex-clock.h | 70 +++ 12 files changed, 784 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/intel,agilex.yaml create mode 100644 drivers/clk/socfpga/clk-agilex.c create mode 100644 include/dt-bindings/clock/agilex-clock.h