| Message ID | 20200929144417.89816-1-alexandru.ardelean@analog.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | clk: axi-clk-gen: misc updates to the driver | expand |
These patches synchronize the driver with the current state in the
Analog Devices Linux tree:
https://github.com/analogdevicesinc/linux/
They have been in the tree for about 2-3, so they did receive some
testing.
Highlights are:
* Add support for fractional dividers (Lars-Peter Clausen)
* Enable support for ZynqMP (UltraScale) (Dragos Bogdan)
* Support frequency limits for ZynqMP (Mathias Tausen)
- And continued by Mircea Caprioru, to read them from the IP cores
Changelog v3 -> v4:
* added patch 'clk: axi-clkgen: wrap limits in a struct and keep copy on the state object'
this resets the rest of the patch-set to adapt to adjusting the limits
on per-clock instance versus being global to the entire driver
Recommended-by: Moritz Fischer <mdf@kernel.org>
https://lore.kernel.org/linux-clk/20200924142108.GA60306@archbook/
Changelog v2 -> v3:
* https://lore.kernel.org/linux-clk/20200924065012.59605-1-alexandru.ardelean@analog.com/
* for patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs'
- fix whitespace found by checkpatch
- add 'Acked-by: Moritz Fischer <mdf@kernel.org>'
Changelog v1 -> v2:
- https://lore.kernel.org/linux-clk/20200804110658.40911-1-alexandru.ardelean@analog.com/
- in patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs'
* converted enums to #define
* added Intel FPGA definitions
* added Device-Package definitions
* added INTEL / XILINX in the define names
definitions according to:
https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_intel_device_info_enc.tcl
https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_xilinx_device_info_enc.tcl
Alexandru Ardelean (1):
clk: axi-clkgen: wrap limits in a struct and keep copy on the state
object
Dragos Bogdan (1):
clk: axi-clkgen: add support for ZynqMP (UltraScale)
Lars-Peter Clausen (2):
clk: axi-clkgen: Add support for fractional dividers
clk: axi-clkgen: Set power bits for fractional mode
Mathias Tausen (1):
clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits
Mircea Caprioru (2):
include: fpga: adi-axi-common.h: add definitions for supported FPGAs
clk: axi-clkgen: Add support for FPGA info
drivers/clk/Kconfig | 2 +-
drivers/clk/clk-axi-clkgen.c | 283 ++++++++++++++++++++++------
include/linux/fpga/adi-axi-common.h | 103 ++++++++++
3 files changed, 326 insertions(+), 62 deletions(-)
These patches synchronize the driver with the current state in the Analog Devices Linux tree: https://github.com/analogdevicesinc/linux/ They have been in the tree for about 2-3, so they did receive some testing. Highlights are: * Add support for fractional dividers (Lars-Peter Clausen) * Enable support for ZynqMP (UltraScale) (Dragos Bogdan) * Support frequency limits for ZynqMP (Mathias Tausen) - And continued by Mircea Caprioru, to read them from the IP cores Changelog v3 -> v4: * added patch 'clk: axi-clkgen: wrap limits in a struct and keep copy on the state object' this resets the rest of the patch-set to adapt to adjusting the limits on per-clock instance versus being global to the entire driver Recommended-by: Moritz Fischer <mdf@kernel.org> https://lore.kernel.org/linux-clk/20200924142108.GA60306@archbook/ Changelog v2 -> v3: * https://lore.kernel.org/linux-clk/20200924065012.59605-1-alexandru.ardelean@analog.com/ * for patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs' - fix whitespace found by checkpatch - add 'Acked-by: Moritz Fischer <mdf@kernel.org>' Changelog v1 -> v2: - https://lore.kernel.org/linux-clk/20200804110658.40911-1-alexandru.ardelean@analog.com/ - in patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs' * converted enums to #define * added Intel FPGA definitions * added Device-Package definitions * added INTEL / XILINX in the define names definitions according to: https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_intel_device_info_enc.tcl https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_xilinx_device_info_enc.tcl Alexandru Ardelean (1): clk: axi-clkgen: wrap limits in a struct and keep copy on the state object Dragos Bogdan (1): clk: axi-clkgen: add support for ZynqMP (UltraScale) Lars-Peter Clausen (2): clk: axi-clkgen: Add support for fractional dividers clk: axi-clkgen: Set power bits for fractional mode Mathias Tausen (1): clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits Mircea Caprioru (2): include: fpga: adi-axi-common.h: add definitions for supported FPGAs clk: axi-clkgen: Add support for FPGA info drivers/clk/Kconfig | 2 +- drivers/clk/clk-axi-clkgen.c | 283 ++++++++++++++++++++++------ include/linux/fpga/adi-axi-common.h | 103 ++++++++++ 3 files changed, 326 insertions(+), 62 deletions(-)