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[v2,0/5] pin and gpio controller driver for Renesas RZ/G2L

Message ID 20210712194422.12405-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
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Series pin and gpio controller driver for Renesas RZ/G2L | expand

Message

Prabhakar July 12, 2021, 7:44 p.m. UTC 
Hi All,

This patch series adds pin and gpio controller driver for Renesas RZ/G2L
SoC. RZ/G2L has a simple pin and GPIO controller combined similar to RZ/A2.

This patch series applies on top of https://git.kernel.org/pub/scm/linux/
kernel/git/geert/renesas-drivers.git/log/?h=topic/rzg2l-update-clock-defs-v4

Cheers,
Prabhakar

Changes for v2:
* Added support for per pin pinmux support
* Added support for pins to set configs
* Dropped pfc-r9a07g044.c/h
* Fixed review comments pointed by Geert
* Included clock/reset changes
* Included DTS/I changes

Lad Prabhakar (5):
  dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Add DT bindings for
    RZ/G2L pinctrl
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  drivers: clk: renesas: r9a07g044-cpg: Add GPIO clock and reset entries
  arm64: dts: renesas: r9a07g044: Add pinctrl node
  arm64: dts: renesas: rzg2l-smarc: Add scif0 pins

 .../pinctrl/renesas,rzg2l-pinctrl.yaml        |  155 +++
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |   13 +
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi  |   10 +
 drivers/clk/renesas/r9a07g044-cpg.c           |    5 +
 drivers/pinctrl/renesas/Kconfig               |   11 +
 drivers/pinctrl/renesas/Makefile              |    1 +
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 1196 +++++++++++++++++
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h   |   23 +
 8 files changed, 1414 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
 create mode 100644 drivers/pinctrl/renesas/pinctrl-rzg2l.c
 create mode 100644 include/dt-bindings/pinctrl/rzg2l-pinctrl.h


base-commit: 06c1e6911a7a76b446e4b00fc8bad5d8465932f8