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(freifunk-gw.bsa1-cpe1.syseleven.net. [176.74.57.43]) by smtp.gmail.com with ESMTPSA id mm30-20020a170906cc5e00b006f3ef214e06sm5675557ejb.108.2022.05.04.05.27.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 05:27:30 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, jonathan@marek.ca, tdas@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov Cc: Robert Foss Subject: [PATCH v3 0/6] SM8350 Display/GPU clock enablement Date: Wed, 4 May 2022 14:27:19 +0200 Message-Id: <20220504122725.179262-1-robert.foss@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This series depends on a patch[1] for parked RCGs, which is being reviewed seperately from this series. Additionally this series is pending a decision about .fw_name .index for new drivers, so please don't merge this yet. [1] https://lore.kernel.org/linux-arm-msm/20220426212136.1543984-1-bjorn.andersson@linaro.org/ Changes since v2 - Dropped "clk: Introduce CLK_ASSUME_ENABLED_WHEN_UNUSED" - Dropped "clk: qcom: sm8250-dispcc: Flag shared RCGs as assumed enable" - Dropped "clk: qcom: rcg2: Cache rate changes for parked RCGs" Jonathan Marek (3): clk: qcom: add support for SM8350 GPUCC clk: qcom: add support for SM8350 DISPCC dt-bindings: clock: Add Qcom SM8350 DISPCC bindings Robert Foss (3): arm64: dts: qcom: sm8350: Replace integers with rpmpd defines dt-bindings: clock: Add Qcom SM8350 GPUCC bindings arm64: dts: qcom: sm8350: Add DISPCC node .../bindings/clock/qcom,dispcc-sm8x50.yaml | 6 +- .../devicetree/bindings/clock/qcom,gpucc.yaml | 2 + arch/arm64/boot/dts/qcom/sm8350.dtsi | 42 +- drivers/clk/qcom/Kconfig | 12 +- drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/dispcc-sm8250.c | 60 +- drivers/clk/qcom/gpucc-sm8350.c | 637 ++++++++++++++++++ .../dt-bindings/clock/qcom,dispcc-sm8350.h | 1 + include/dt-bindings/clock/qcom,gpucc-sm8350.h | 52 ++ 9 files changed, 800 insertions(+), 13 deletions(-) create mode 100644 drivers/clk/qcom/gpucc-sm8350.c create mode 120000 include/dt-bindings/clock/qcom,dispcc-sm8350.h create mode 100644 include/dt-bindings/clock/qcom,gpucc-sm8350.h