From patchwork Wed May 17 09:41:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13244542 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF6F3C77B75 for ; Wed, 17 May 2023 09:42:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbjEQJmU (ORCPT ); Wed, 17 May 2023 05:42:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229920AbjEQJmT (ORCPT ); Wed, 17 May 2023 05:42:19 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F2E540E6; Wed, 17 May 2023 02:42:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1684316537; x=1715852537; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=FeioifEDxdEGwYiM4iQLG5+TkZ9F3zFlGDG+wIqLuxE=; b=0MR7kQaQd/1c76YvDpqyJMD8QU0JkKKKp1firltOxeQmpdmqk/yZALC3 Pr7ZeSRgScnTr5RJ70pTn1saSfq6AoQvXSMU+t9iIQdGmy23xRDpnxWtK UgvtL78f67nMbR+Wy9fSnBbM/xNqwoizB2RqgjjSvWogQlcRJzsem2SNT WQFmssDMO+bCsltiCXjUfxVm4uIXug64+zuY0sktMRZPF586SyiDRE7+Q cP2NVsB6CeeZDxOxYXjkb+Tv0qjEcVi2Nqu2YqXqffUI3xTdil27mr6tp kRPc/FlvA6l+0FzHRv+Kze1jIrwgZweubwr3jjTA7ky4XJS06adySLQrl w==; X-IronPort-AV: E=Sophos;i="5.99,281,1677567600"; d="scan'208";a="211698232" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 May 2023 02:42:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 17 May 2023 02:42:15 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Wed, 17 May 2023 02:42:11 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v5 0/5] dt-bindings: clocks: at91: convert to yaml Date: Wed, 17 May 2023 12:41:14 +0300 Message-ID: <20230517094119.2894220-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi, This series converts atmel clocks bindings (PMC and slow clock controller) to YAML. Along with it updated device trees to cope with the dt-binding requirements. Thank you, Claudiu Beznea Changes in v4: - in patch 2/5: added "atmel,at91sam9x5-pmc", "syscon" to the list of available compatibles Changes in v4: - changed the approach the compatibles are treated in patch 2/5 to avoid having 2 enums on one items entry (thanks Conor for hint) Changes in v3: - in patch 2/5: - get rid of 1st "items" section and embedd it in the last compatible enum - sort alphanumerically the compatibles in allOf - collected tags Changes in v2: - in patch 2/5: - dropped quotes from $id and $schema - get rid of 1st "items" sections corresponding to "atmel,at91sam9260-pmc", "syscon" compatible and move it to the proper enum - ordered compatibles by name - add description for #clock-cells - remove blank lines - keep order in required (same order that the properties were defined) - dropped required from allOf - in patch 5/5: - dropped quotes from $id and $schema - drop first "items:" in compatible:oneOf section - ordered compatibles by name - moved additionalProperties after allOf - dropped microchip,sama7g5-sckc from first allOf:if section - moved "required" section from allOf to global "required" section - dropped if:then from the last if:then:else in allOf Claudiu Beznea (5): ARM: dts: at91: use clock-controller name for PMC nodes dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings ARM: dts: at91: use clock-controller name for sckc nodes dt-bindings: clocks: at91sam9x5-sckc: convert to yaml .../devicetree/bindings/clock/at91-clock.txt | 58 ------- .../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++ .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 ++++++++ arch/arm/boot/dts/at91rm9200.dtsi | 2 +- arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 2 +- arch/arm/boot/dts/at91sam9g20.dtsi | 2 +- arch/arm/boot/dts/at91sam9g25.dtsi | 2 +- arch/arm/boot/dts/at91sam9g35.dtsi | 2 +- arch/arm/boot/dts/at91sam9g45.dtsi | 4 +- arch/arm/boot/dts/at91sam9n12.dtsi | 25 +-- arch/arm/boot/dts/at91sam9rl.dtsi | 4 +- arch/arm/boot/dts/at91sam9x25.dtsi | 2 +- arch/arm/boot/dts/at91sam9x35.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 4 +- arch/arm/boot/dts/sam9x60.dtsi | 4 +- arch/arm/boot/dts/sama5d2.dtsi | 4 +- arch/arm/boot/dts/sama5d3.dtsi | 4 +- arch/arm/boot/dts/sama5d3_emac.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 4 +- arch/arm/boot/dts/sama7g5.dtsi | 2 +- 22 files changed, 253 insertions(+), 104 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml