From patchwork Fri Jun 9 11:50:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagadeesh Kona X-Patchwork-Id: 13273769 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B14F6C8300C for ; Fri, 9 Jun 2023 11:51:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239082AbjFILvq (ORCPT ); Fri, 9 Jun 2023 07:51:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239126AbjFILvk (ORCPT ); Fri, 9 Jun 2023 07:51:40 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62F7A1A2; Fri, 9 Jun 2023 04:51:26 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 359B0683010213; Fri, 9 Jun 2023 11:51:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=6cgGnHRKv+6/MYXYjEBobhWbvjL83DTMvCKRv9xXq9I=; b=Ptqle11p39TRfuAAuNhRMoxAKABDDmaEVtQg78O6jk21dXVG5TzfAaptkyaNDp40Di1j 4AHok6spGRXGadqmvliZjNb19isYL4cb+bfKj5M+fSLaXbTcQDwT8RnwKlnSjfdFx0nQ KrzmMDbl+BjlNaYa8zDKDL4t3zxoF6lmPrivbrEnaYT6gL8TmVB92E9fvJYfoPW4BZDO pAA2yfaclEt9l9EpTVXAbSwxTe4Q1RzVzk8jBA7dx6Dbx+H2mnNm1S0x0vgm+ebApjne N61FPCTWQb0w/79HwV4d8FDb8sw28Dl5Mg9Q0UbqfUlYfQWp4XMaLLySWNdisDkQdxTl Kg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3r3nwesd35-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 09 Jun 2023 11:51:22 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 359BpL9L018729 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 9 Jun 2023 11:51:21 GMT Received: from hu-jkona-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 9 Jun 2023 04:51:16 -0700 From: Jagadeesh Kona To: Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Bjorn Andersson , Vladimir Zapolskiy , , , , , Taniya Das , "Jagadeesh Kona" , Satya Priya Kakitapalli , Imran Shaik , "Ajit Pandey" Subject: [PATCH V4 0/4] Add camera clock controller support for SM8550 Date: Fri, 9 Jun 2023 17:20:54 +0530 Message-ID: <20230609115058.9059-1-quic_jkona@quicinc.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: FBiQkUJfck_KqJt-psMpUb6QfuSjew3r X-Proofpoint-ORIG-GUID: FBiQkUJfck_KqJt-psMpUb6QfuSjew3r X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-09_08,2023-06-09_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 mlxlogscore=798 phishscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 spamscore=0 adultscore=2 mlxscore=0 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306090100 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add bindings, driver and devicetree node for camera clock controller on SM8550. Jagadeesh Kona (4): dt-bindings: clock: qcom: Add SM8550 camera clock controller clk: qcom: camcc-sm8550: Add camera clock controller driver for SM8550 clk: qcom: camcc-sm8550: Add support for qdss, sleep and xo clocks arm64: dts: qcom: sm8550: Add camera clock controller .../bindings/clock/qcom,sm8450-camcc.yaml | 8 +- arch/arm64/boot/dts/qcom/sm8550.dtsi | 15 + drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/camcc-sm8550.c | 3585 +++++++++++++++++ include/dt-bindings/clock/qcom,sm8550-camcc.h | 187 + 6 files changed, 3801 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/qcom/camcc-sm8550.c create mode 100644 include/dt-bindings/clock/qcom,sm8550-camcc.h