[0/2] 8650 PLL config updates

Message ID	20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org (mailing list archive)
Headers	show Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C5E942051 for <linux-clk@vger.kernel.org>; Tue, 19 Dec 2023 18:55:38 +0000 (UTC) From: Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH 0/2] 8650 PLL config updates Date: Tue, 19 Dec 2023 19:55:31 +0100 Message-Id: <20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org> Precedence: bulk MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org>
Series	8650 PLL config updates \| expand [0/2] 8650 PLL config updates [1/2] clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config [2/2] clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config

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20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org (mailing list archive)

Headers

From: Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH 0/2] 8650 PLL config updates
Date: Tue, 19 Dec 2023 19:55:31 +0100
Message-Id: <20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org>
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To: Bjorn Andersson <andersson@kernel.org>,
 Michael Turquette <mturquette@baylibre.com>,
 Stephen Boyd <sboyd@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
 linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
 linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org>

Series

8650 PLL config updates | expand

Message

Konrad Dybcio Dec. 19, 2023, 6:55 p.m. UTC

Some TEST_CTL values were missing, add them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Konrad Dybcio (2):
      clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
      clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config

 drivers/clk/qcom/dispcc-sm8650.c | 8 ++++++++
 drivers/clk/qcom/gpucc-sm8650.c  | 2 ++
 2 files changed, 10 insertions(+)
---
base-commit: aa4db8324c4d0e67aa4670356df4e9fae14b4d37
change-id: 20231219-topic-8650_clks-e45e94ae458b

Best regards,

Comments

Bjorn Andersson Dec. 19, 2023, 8:28 p.m. UTC | #1

On Tue, 19 Dec 2023 19:55:31 +0100, Konrad Dybcio wrote:
> Some TEST_CTL values were missing, add them.
> 
> 

Applied, thanks!

[1/2] clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
      commit: 3f8d7f490a33625786b427ec925215c4c1f191d1
[2/2] clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
      commit: 757d1ca14f94e4e00777491dcab0b4abee18f9bf

Best regards,