[v8,0/7] rockchip: clk: improve GATE_LINK support

Message

Sebastian Reichel Jan. 26, 2024, 6:18 p.m. UTC

Hi,

This is a follow-up for Elaine's series. These patches are written from
scratch, though. There are two parts:

part 1:
Elaine's series used to contain patches for the VO1GRF handling, but they were
dropped at some point because of the CLK_NR_CLKS feedback from the DT
maintainers. I added some code, that should hopefully fix everyones concerns by
figuring out the right number at runtime. I also moved the correct handling of
pclk_vo0grf/pclk_vo1grf before proper handling of GATE_LINK clocks, so that it
can be merged ASAP. These patches are needed for HDMI RX/TX support on RK3588.

part 2:
For proper GATE_LINK support I tried implementing the suggestion from Stephen
Boyd to use clk PM operations by creating MFD dynamically. This required some
restructuring, since CLK_OF_DECLARE() is called before devices are available.
All of this can be found in the last patch of this series.

Changes since PATCHv7:
 * https://lore.kernel.org/all/[e-mail]/
 * rebased to v6.8-rc1
 * Collected Reviewed-by/Acked-by from Krzysztof Kozlowski for DT binding patches
 * support nr_clk=0 in rockchip_clk_find_max_clk_id() for smatch

Greetings,

-- Sebstian

Sebastian Reichel (7):
  clk: rockchip: rk3588: fix CLK_NR_CLKS usage
  dt-bindings: clock: rk3588: drop CLK_NR_CLKS
  dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
  clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
  clk: rockchip: rk3588: fix indent
  clk: rockchip: rk3588: use linked clock ID for GATE_LINK
  clk: rockchip: implement proper GATE_LINK support

 drivers/clk/rockchip/clk-rk3588.c             | 163 ++++++++----------
 drivers/clk/rockchip/clk.c                    |  86 ++++++++-
 drivers/clk/rockchip/clk.h                    |  18 ++
 .../dt-bindings/clock/rockchip,rk3588-cru.h   |   3 +-
 4 files changed, 179 insertions(+), 91 deletions(-)

Comments

Sebastian Reichel Feb. 16, 2024, 5:15 p.m. UTC | #1

Hi,

On Fri, Jan 26, 2024 at 07:18:21PM +0100, Sebastian Reichel wrote:
> This is a follow-up for Elaine's series. These patches are written from
> scratch, though. There are two parts:
> 
> part 1:
> Elaine's series used to contain patches for the VO1GRF handling, but they were
> dropped at some point because of the CLK_NR_CLKS feedback from the DT
> maintainers. I added some code, that should hopefully fix everyones concerns by
> figuring out the right number at runtime. I also moved the correct handling of
> pclk_vo0grf/pclk_vo1grf before proper handling of GATE_LINK clocks, so that it
> can be merged ASAP. These patches are needed for HDMI RX/TX support on RK3588.
> 
> part 2:
> For proper GATE_LINK support I tried implementing the suggestion from Stephen
> Boyd to use clk PM operations by creating MFD dynamically. This required some
> restructuring, since CLK_OF_DECLARE() is called before devices are available.
> All of this can be found in the last patch of this series.

Any comments? It would be great if at least part 1 gets into v6.9.
That should be easy to review and unblocks further work.

Greetings,

-- Sebastian

Heiko Stuebner Feb. 27, 2024, 9:16 p.m. UTC | #2

On Fri, 26 Jan 2024 19:18:21 +0100, Sebastian Reichel wrote:
> This is a follow-up for Elaine's series. These patches are written from
> scratch, though. There are two parts:
> 
> part 1:
> Elaine's series used to contain patches for the VO1GRF handling, but they were
> dropped at some point because of the CLK_NR_CLKS feedback from the DT
> maintainers. I added some code, that should hopefully fix everyones concerns by
> figuring out the right number at runtime. I also moved the correct handling of
> pclk_vo0grf/pclk_vo1grf before proper handling of GATE_LINK clocks, so that it
> can be merged ASAP. These patches are needed for HDMI RX/TX support on RK3588.
> 
> [...]

Applied, thanks!

[1/7] clk: rockchip: rk3588: fix CLK_NR_CLKS usage
      commit: 2dc66a5ab2c6fb532fbb16107ee7efcb0effbfa5
[2/7] dt-bindings: clock: rk3588: drop CLK_NR_CLKS
      commit: 11a29dc2e41ead2be78cfa9d532edf924b461acc
[3/7] dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
      commit: c81798cf9dd2f324934585b2b52a0398caefb88e

First part that needs to be shared between clock-tree
and the devicetree change I sent out some minutes ago [0]


[0] https://lore.kernel.org/linux-rockchip/[e-mail]


Best regards,

Heiko Stuebner Feb. 27, 2024, 9:28 p.m. UTC | #3

On Fri, 26 Jan 2024 19:18:21 +0100, Sebastian Reichel wrote:
> This is a follow-up for Elaine's series. These patches are written from
> scratch, though. There are two parts:
> 
> part 1:
> Elaine's series used to contain patches for the VO1GRF handling, but they were
> dropped at some point because of the CLK_NR_CLKS feedback from the DT
> maintainers. I added some code, that should hopefully fix everyones concerns by
> figuring out the right number at runtime. I also moved the correct handling of
> pclk_vo0grf/pclk_vo1grf before proper handling of GATE_LINK clocks, so that it
> can be merged ASAP. These patches are needed for HDMI RX/TX support on RK3588.
> 
> [...]

Applied, thanks!

[4/7] clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
      commit: 326be62eaf2e89767b7b9223f88eaf3c041b98d2
[5/7] clk: rockchip: rk3588: fix indent
      commit: 2a6e4710672242281347103b64e01693aa823a29
[6/7] clk: rockchip: rk3588: use linked clock ID for GATE_LINK
      commit: dae3e57000fb2d6f491e3ee2956f5918326d6b72

2nd part of the very easy and obvious clock patches that make
sense on their own already.

Now I just need to look at the final piece of the puzzle :-) .


Best regards,