| Message ID | 20240612-sa8775p-v2-gcc-gpucc-fixes-v2-0-adcc756a23df@quicinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Update GCC, GPUCC clock drivers on SA8775P | expand |
On Wed, 12 Jun 2024 16:38:20 +0530, Taniya Das wrote: > Update GCC, GPUCC clock controller drivers on SA8775P platform. > > Changes in V2: > [PATCH 1/6]: Dropped fixes tag for removing ufs hw ctl clocks > [PATCH 3/6]: Updated commit text on setting FORCE_MEM_CORE_ON > bit for ufs phy ice core clk > [PATCH 4/6]: Updated commit text on removing CLK_IS_CRITICAL > for GPU clocks > > [...] Applied, thanks! [1/6] clk: qcom: gcc-sa8775p: Remove support for UFS hw ctl clocks commit: d3b33848627d2b0e02bfcd74ea1671d0d6df3aec [2/6] clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags commit: be208c0ccf7d861fc6109ca06c1a773512739af9 [3/6] clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk commit: 955606a7b073d724a50a6ab1119987e189fc3e36 [4/6] clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON flags commit: e69386d4a42afa5da6bfdcd4ac5ec61e1db04c61 [5/6] clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable commit: dff68b2f74547617dbb75d0d12f404877ec8f8ce [6/6] clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's commit: 211681998d706d1e0fff6b62f89efcdf29c24978 Best regards,
Update GCC, GPUCC clock controller drivers on SA8775P platform. Changes in V2: [PATCH 1/6]: Dropped fixes tag for removing ufs hw ctl clocks [PATCH 3/6]: Updated commit text on setting FORCE_MEM_CORE_ON bit for ufs phy ice core clk [PATCH 4/6]: Updated commit text on removing CLK_IS_CRITICAL for GPU clocks Link to V1: https://lore.kernel.org/all/20240531090249.10293-1-quic_tdas@quicinc.com/ Multimedia clock controller patches from above v1 series have been split to a separate series: https://lore.kernel.org/lkml/20240612-sa8775p-mm-clock-controllers-v1-0-db295a846ee7@quicinc.com/T/#t --- Taniya Das (6): clk: qcom: gcc-sa8775p: Remove support for UFS hw ctl clocks clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON flags clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's drivers/clk/qcom/gcc-sa8775p.c | 154 ++++++++++++--------------------------- drivers/clk/qcom/gpucc-sa8775p.c | 41 ++++++----- 2 files changed, 66 insertions(+), 129 deletions(-) --- base-commit: 03d44168cbd7fc57d5de56a3730427db758fc7f6 change-id: 20240612-sa8775p-v2-gcc-gpucc-fixes-ec128d5847e8 Best regards,