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Tue, 2 Jul 2024 15:50:53 GMT Received: from hu-skakitap-hyd.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 08:50:47 -0700 From: Satya Priya Kakitapalli Subject: [PATCH v2 0/6] clk: qcom: sm8150: Add camera clock controller support for SM8150 Date: Tue, 2 Jul 2024 21:20:38 +0530 Message-ID: <20240702-camcc-support-sm8150-v2-0-4baf54ec7333@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAM4hhGYC/4WNQQ6CMBBFr0Jm7Zh2RCmuvIdhUYcis4DWFoiGc HcrF3D5XvLfXyG5KC7BtVghukWS+DEDHQrg3o5Ph9JmBlJUKqIa2Q7MmOYQfJwwDUafFbanriJ bWm3pAXkaouvkvWfvTeZe0uTjZ39Z9M/+CS4aFRomwxc2VV2r22sWlpGP7Adotm37AlTNfuC6A AAA To: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Abhishek Sahu , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley CC: Stephen Boyd , , , , , Ajit Pandey , "Imran Shaik" , Taniya Das , Jagadeesh Kona , Satya Priya Kakitapalli , , Krzysztof Kozlowski , Bryan O'Donoghue X-Mailer: b4 0.13.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: uO_wj_DIpogF7GLf1pl90PGR1HYSZ8YM X-Proofpoint-ORIG-GUID: uO_wj_DIpogF7GLf1pl90PGR1HYSZ8YM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_11,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 bulkscore=0 mlxlogscore=982 priorityscore=1501 impostorscore=0 suspectscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1011 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407020117 Add camcc support and Regera PLL ops. Also, fix the pll post div mask. Signed-off-by: Satya Priya Kakitapalli --- Changes in v2: - As per Konrad's comments, re-use the zonda pll code for regera, as both are mostly same. - Fix the zonda_set_rate API and also the pll_post_div shift used in trion pll post div set rate API - Link to v1: https://lore.kernel.org/r/20240229-camcc-support-sm8150-v1-0-8c28c6c87990@quicinc.com --- Satya Priya Kakitapalli (5): clk: qcom: alpha-pll: Fix the pll post div mask and shift clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL dt-bindings: clock: qcom: Add SM8150 camera clock controller clk: qcom: Add camera clock controller driver for SM8150 arm64: dts: qcom: Add camera clock controller for sm8150 Taniya Das (1): clk: qcom: clk-alpha-pll: Add support for Regera PLL ops .../bindings/clock/qcom,sm8150-camcc.yaml | 77 + arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 + arch/arm64/boot/dts/qcom/sm8150.dtsi | 13 + drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/camcc-sm8150.c | 2159 ++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.c | 56 +- drivers/clk/qcom/clk-alpha-pll.h | 5 + include/dt-bindings/clock/qcom,sm8150-camcc.h | 135 ++ 9 files changed, 2455 insertions(+), 4 deletions(-) --- base-commit: 20af1ca418d2c0b11bc2a1fe8c0c88f67bcc2a7e change-id: 20240229-camcc-support-sm8150-d3f72a4a1a2b Best regards,