Message ID | 20240730-mbly-clk-v3-0-4f90fad2f203@bootlin.com (mailing list archive) |
---|---|
Headers | show |
Series | Add Mobileye EyeQ clock support | expand |
Hello all, On Tue Jul 30, 2024 at 6:04 PM CEST, Théo Lebrun wrote: > This is a new iteration on the clock part of the Mobileye > system-controller series. It used to be sent as a single series [0], > but has been split in the previous revisions (see [1], [2], [3], [4]) > to faciliate merging. This is a friendly RESEND of the Mobileye system-controller series, now that v6.11-rc1 is out. It applies just fine, and has been tested on real hardware. Thanks, -- Théo Lebrun, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi Stephen, On Tue Jul 30, 2024 at 6:04 PM CEST, Théo Lebrun wrote: > This is a new iteration on the clock part of the Mobileye > system-controller series. It used to be sent as a single series [0], > but has been split in the previous revisions (see [1], [2], [3], [4]) > to faciliate merging. What's your state of mind on this series? I am happy at how it turned out and believe the whole system-controller for the platform is modeled properly now. It works as expected on real hardware. Pinctrl got in. Thanks, -- Théo Lebrun, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
This is a new iteration on the clock part of the Mobileye system-controller series. It used to be sent as a single series [0], but has been split in the previous revisions (see [1], [2], [3], [4]) to faciliate merging. This series adds a platform driver dealing with read-only PLLs derived from the main crystal, and some divider clocks based on those PLLs. It also acts at the one instantiating reset and pinctrl auxiliary devices. One special feature is that some clocks are required before platform bus infrastructure is available; we therefore register some clocks at the of_clk_init() stage. We support EyeQ5, EyeQ6L and EyeQ6H SoCs. The last one is special in that there are seven instances of this system-controller. All of those handle clocks. Only clock is receiving a v3; other driver series (reset, pinctrl) stay at v2. MIPS [4] has been taken in the MIPS tree [5]. Have a nice day, Théo [0]: https://lore.kernel.org/lkml/20240620-mbly-olb-v3-0-5f29f8ca289c@bootlin.com/ [1]: https://lore.kernel.org/lkml/20240703-mbly-clk-v2-0-fe8c6199a579@bootlin.com/ [2]: https://lore.kernel.org/lkml/20240703-mbly-reset-v2-0-3fe853d78139@bootlin.com/ [3]: https://lore.kernel.org/lkml/20240703-mbly-pinctrl-v2-0-eab5f69f1b01@bootlin.com/ [4]: https://lore.kernel.org/lkml/20240628-mbly-mips-v1-0-f53f5e4c422b@bootlin.com/ [5]: https://lore.kernel.org/lkml/ZoVr8g3B7nUwRujO@alpha.franken.de/ Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> --- Changes in v3: - Kconfig: add "depends on 64BIT" because we use readq(). This removes the ability to COMPILE_TEST the driver on 32bit, which is fine as this is a SoC clk platform driver used on 64bit SoCs. - driver: avoid `of_match_node(...)->data` because, if !CONFIG_OF, of_match_node(...) is resolved by the preprocessor to NULL. There is still a warning "eqc_early_match_table declared but unused" if !CONFIG_OF. We fix the <linux/of.h> header in a separate patch: https://lore.kernel.org/lkml/20240708-of-match-node-v1-1-90aaa7c2d21d@bootlin.com/ - Link to v2: see [1] Changes in v2: - bindings: take Acked-by: Krzysztof Kozlowski. - driver: eqc_auxdev_create(): cast the `void __iomem *base` variable to (void __force *) before putting it in platform_data, to avoid sparse warning. - Link to v1: see [1] Changes since OLB v3 [0]: - MAINTAINERS: Move changes into a separate commit to avoid merge conflicts. This commit is in the MIPS series [3]. - dt-bindings: split include/dt-bindings/ changes into its own commit. It is part of this clk series. - dt-bindings: Take Reviewed-by: Rob Herring. The include/dt-bindings/ new commit has NOT inherited from it, just to make sure. --- Théo Lebrun (4): Revert "dt-bindings: clock: mobileye,eyeq5-clk: add bindings" dt-bindings: clock: add Mobileye EyeQ6L/EyeQ6H clock indexes clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag clk: eyeq: add driver .../bindings/clock/mobileye,eyeq5-clk.yaml | 51 -- drivers/clk/Kconfig | 13 + drivers/clk/Makefile | 1 + drivers/clk/clk-divider.c | 12 +- drivers/clk/clk-eyeq.c | 793 +++++++++++++++++++++ include/dt-bindings/clock/mobileye,eyeq5-clk.h | 21 + include/linux/clk-provider.h | 11 +- 7 files changed, 844 insertions(+), 58 deletions(-) --- base-commit: 256abd8e550ce977b728be79a74e1729438b4948 change-id: 20240628-mbly-clk-4c6ebc716347 Best regards,