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[2001:14ba:a0c3:3a00:70b:e6fc:b322:6a1b]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2fb9ae1217bsm4522711fa.112.2024.10.21.03.30.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Oct 2024 03:30:39 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH v2 00/11] clk: qcom: add support for clock controllers on the SAR2130P platform Date: Mon, 21 Oct 2024 13:30:28 +0300 Message-Id: <20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAEQtFmcC/3WNQQ6CMBBFr0Jmbc20lqCuuIdhUegUJhJKpoZoS O9uZe/yveS/v0MiYUpwr3YQ2jhxXAqYUwXD5JaRFPvCYNBYjbpRyYnRF1zVMMfhmVQdeu9vfUB LBGW1CgV+H8VHV3ji9IryOQ42/bP/W5tWqEJTU2MxoLv6dubFSTxHGaHLOX8B7Z0lC68AAAA= X-Change-ID: 20241017-sar2130p-clocks-5fbdd9bf04ee To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Neil Armstrong , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Krzysztof Kozlowski , Konrad Dybcio , Kalpak Kawadkar , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2872; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=+FD8i4VW6GLQ+8kCcEhzI155Je7Z5QpsCm7eSObmh04=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBnFi1J3sbNoJuEo0OyMEAqxEbEG6iENQLiJFesL D4hZ4Y0AkGJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZxYtSQAKCRAU23LtvoBl uGqDD/9N1rXjF5247C2hgwlQi0Ed8/wDtJ9N8HygswjvjGX2Dpw7g4NR9OAVySkJ6HqGuqyiEWu j0n9T/IQ4fDvTyhK7jD4pwTti/B/QoT79NvTWFAMbO5GaP4oeOFLcL5HU7PkqePvQ08E8XhyZua WSDN+e/zj0md3AIcfYenaM6/buq9rqM1jst+cv3rNVQAl2yhCmNqBq9C+deqIEBTqq5mz0eSky6 nOuBUI/IivMRyJtFOtm60U3NXS/x1L21SAMGh3TpaJYy2gte+Z/OEWEDF71weJWJUhebuQ0uhqg 2MSyF0RlFDT/9YH4cbOyGih1Ycht9RJL7yYwV+CDYOPlKYGzrupxRFMLXB/iM33ELLMYBB+bbfI PgoayuHMi6ScIi37JpJvBpg0MWUnCu/mW2npl59UlkraQX1KqFyxiyFhQJ9X97zawpex1nx/Ibw vW+Pi5WER4GlTvWIZIFY3DrJ8zqMujyGE67vJUncuQpoELAQZ7M17kPri+0gw0tkNLxMS0fFIaY k3GutUIdJfxdNHn69jE2lcOk0N1Xma6+Bc12Bc+czRYeWzapRvhf6aHrtVORaQnyaoLYnpkCLN0 cLA3N8m7rRwRgza0Wn5Co75ksAhKqIfDw3Vj3a+UinqccDqJbPjVYfkxNKx97ND397gxrXWikVO q2c6YT+Cvw5+xJA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add support for the RPMh, TCSR, Global, Display and GPU clock controllers as present on the Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov --- Changes in v2: - Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk, gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk, gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg, gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding subsytems bringup (Taniya) - Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya) - Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches (Taniya) - Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5, gcc_parent_map_5 (LKP) - Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org --- Dmitry Baryshkov (9): dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible dt-bindings: clock: qcom: document SAR2130P Global Clock Controller dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible clk: qcom: rcg2: add clk_rcg2_shared_floor_ops clk: qcom: rpmh: add support for SAR2130P clk: qcom: add support for GCC on SAR2130P clk: qcom: tcsrcc-sm8550: add SAR2130P support clk: qcom: dispcc-sm8550: enable support for SAR2130P Konrad Dybcio (2): dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles clk: qcom: add SAR2130P GPU Clock Controller support .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,sar2130p-gcc.yaml | 65 + .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 + .../bindings/clock/qcom,sm8550-dispcc.yaml | 1 + .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 + drivers/clk/qcom/Kconfig | 22 +- drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 48 +- drivers/clk/qcom/clk-rpmh.c | 11 + drivers/clk/qcom/dispcc-sm8550.c | 18 +- drivers/clk/qcom/gcc-sar2130p.c | 2326 ++++++++++++++++++++ drivers/clk/qcom/gpucc-sar2130p.c | 507 +++++ drivers/clk/qcom/tcsrcc-sm8550.c | 18 +- include/dt-bindings/clock/qcom,sar2130p-gcc.h | 181 ++ include/dt-bindings/clock/qcom,sar2130p-gpucc.h | 33 + include/dt-bindings/reset/qcom,sar2130p-gpucc.h | 14 + 17 files changed, 3240 insertions(+), 11 deletions(-) --- base-commit: 27e373c583871ca992837ab918709b67e27d1e3d change-id: 20241017-sar2130p-clocks-5fbdd9bf04ee Best regards,