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[2001:14ba:a0c3:3a00:70b:e6fc:b322:6a1b]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1c7cf4sm532188e87.184.2024.10.26.08.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Oct 2024 08:47:06 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH v4 00/11] clk: qcom: add support for clock controllers on the SAR2130P platform Date: Sat, 26 Oct 2024 18:46:58 +0300 Message-Id: <20241026-sar2130p-clocks-v4-0-37100d40fadc@linaro.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAPIOHWcC/3XNQQ6CMBCF4auQrq3pTFtBV97DuCh0Co2GktYQD eHuFlYY4vJ/yXwzsUTRU2KXYmKRRp986HOoQ8GazvQtcW9zMxSoQEDJk4kIUgy8eYbmkbh2tbX n2glFxPLVEMn59yre7rk7n14hftYHIyzrf2sELrgrNZVKOGEqe3363sRwDLFlCzbiBkDYA5gBW UnSVANKgztAbgG9B2QGVOWgUugs6NMPMM/zF6PmOrkxAQAA X-Change-ID: 20241017-sar2130p-clocks-5fbdd9bf04ee To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Neil Armstrong , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Konrad Dybcio , Kalpak Kawadkar , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3457; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=DnphJ809DpBOTKhoHJ/6RAFXBFta/89tt+gIiuZqKRk=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBnHQ7170tw4vV13ywWM0BQprAuGf/i5GISxNYdK QRXq7us1UyJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZx0O9QAKCRAU23LtvoBl uCViD/48fIW1ysYTMtRjkwuqrNc8xSHfH1Palf1lEh3mq076pVTTudgeTM+KL/896SqXGGizrS5 ExIA7aApdwtpkEfWfub3YqPAcmoodnEKyrqBek/1ivYyaoeiMIChYrPvJ2EPdWC/KPFcXExjRFq RbdOgCRcZodsZxH4O0XHoEqcIxnZf3SCLY6oVrXMzH086TDoUVSocUp1vv7fyFf66XQBk2GF5qD +ZMC07P/yDmLwsmzQMZOxhnD7V2Hrl5Lyo3tza1LYQL9c3iF2l1XS1U3RBAYQfSpFK0p5JPqv66 Ylt/iygkwtUZ6JRKN3N9zrPzVLLxJ+SYEKCypeq6opi+N5FMtdN/fvdrS1t+Zvgju3s6tx4z18f 3dWcB/x8KMhEgJ4QCXbdf97bl2me/CY8k9NMf333ekARZG7C0HVx0sXndWdACQdBNvHaL1as5lV 9ymXjVPzOoXiYKqLCjaoMSMgO9dkWYp4ak/j7hsJ6TzWHbLsUTwiXKPb0KrrS51yNSqcmQO2wKg KBM5b9swBGe0+jm10F6iLqjDM5IoQxwjOLlcfNHFNZFxw9+csZK/WEIAib28bFfiD1gX67Fp7jw 7h/A2CnhoCMhp2uR+ifQR1+PxiD0ONIF9QDYSwEruIV9H3jPORVRo86b6qNH0N5M6rxmHzHg+eB rvg4yjrXUoiCHLA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add support for the RPMh, TCSR, Global, Display and GPU clock controllers as present on the Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov --- Changes in v4: - Fixed commit message for the RPMh clocks patch to mention RF_CLK1 clock (Konrad) - Link to v3: https://lore.kernel.org/r/20241025-sar2130p-clocks-v3-0-48f1842fd156@linaro.org Changes in v3: - Added rfclka1 to RPMh clocks for SAR2140P (Taniya) - Added HLOS1_VOTE_MM_SNOC_MMU_TBU_HF0_GDSC, HLOS1_VOTE_MM_SNOC_MMU_TBU_SF0_GDSC, HLOS1_VOTE_TURING_MMU_TBU0_GDSC, HLOS1_VOTE_TURING_MMU_TBU1_GDSC (Taniya) - Removed extra debug print in gpucc probe (Konrad) - Link to v2: https://lore.kernel.org/r/20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org Changes in v2: - Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk, gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk, gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg, gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding subsytems bringup (Taniya) - Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya) - Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches (Taniya) - Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5, gcc_parent_map_5 (LKP) - Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org --- Dmitry Baryshkov (9): dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible dt-bindings: clock: qcom: document SAR2130P Global Clock Controller dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible clk: qcom: rcg2: add clk_rcg2_shared_floor_ops clk: qcom: rpmh: add support for SAR2130P clk: qcom: add support for GCC on SAR2130P clk: qcom: tcsrcc-sm8550: add SAR2130P support clk: qcom: dispcc-sm8550: enable support for SAR2130P Konrad Dybcio (2): dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles clk: qcom: add SAR2130P GPU Clock Controller support .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,sar2130p-gcc.yaml | 65 + .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 + .../bindings/clock/qcom,sm8550-dispcc.yaml | 1 + .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 + drivers/clk/qcom/Kconfig | 22 +- drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 48 +- drivers/clk/qcom/clk-rpmh.c | 13 + drivers/clk/qcom/dispcc-sm8550.c | 18 +- drivers/clk/qcom/gcc-sar2130p.c | 2366 ++++++++++++++++++++ drivers/clk/qcom/gpucc-sar2130p.c | 503 +++++ drivers/clk/qcom/tcsrcc-sm8550.c | 18 +- include/dt-bindings/clock/qcom,sar2130p-gcc.h | 185 ++ include/dt-bindings/clock/qcom,sar2130p-gpucc.h | 33 + include/dt-bindings/reset/qcom,sar2130p-gpucc.h | 14 + 17 files changed, 3282 insertions(+), 11 deletions(-) --- base-commit: f6202e7cb4762be30b01ca4e1666512171c16d2a change-id: 20241017-sar2130p-clocks-5fbdd9bf04ee Best regards,