Message ID | 20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org (mailing list archive) |
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Sat, 18 Jan 2025 16:54:56 -0800 (PST) From: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Subject: [PATCH v4 0/4] Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon Date: Sun, 19 Jan 2025 00:54:52 +0000 Message-Id: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: <linux-clk.vger.kernel.org> List-Subscribe: <mailto:linux-clk+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-clk+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFxNjGcC/53NwUrEMBDG8VdZcnZkZppJqiffQzykmXQ3oK0kt VSWvrvZBRHxtB6/gfn9z6amklM1j4ezKWnNNc9TG/buYOIpTMcEWds2jGyJ6AEGC695+thgSts CbIEIqAddaoaNUo+ECDG81Qo9B9f5zil6Ng18L2nM2zX2/NL2KddlLp/X9kqX678yKwGCWPSiX kYn9ql9hjLfz+VoLp2Vf2xmf5PNzUY3qkrwKsPwx+6+bWlvfJPdNTsOzqmIMsb4y973/QuC+Ft InQEAAA== X-Change-ID: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 To: Loic Poulain <loic.poulain@linaro.org>, Robert Foss <rfoss@kernel.org>, Andi Shyti <andi.shyti@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Todor Tomov <todor.too@gmail.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>, Jagadeesh Kona <quic_jkona@quicinc.com>, Konrad Dybcio <konradybcio@kernel.org> Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue <bryan.odonoghue@linaro.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> X-Mailer: b4 0.15-dev-33ea6 |
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Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon
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v4: - Applies RB from Konrad - Adds the second CCI I2C bus to CCI commit log description. I previously considered leaving out the always on pins but, decided to include them in the end and forgot to align the commit log. - Alphabetises the camcc.h included in the dtsi. - Vlad - Link to v3: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-0-cb66d55d20cc@linaro.org v3: - Fixes ordering of headers in dtsi - Vlad - Changes camcc to always on - Vlad - Applies RB as indicated - Krzysztof, Konrad - Link to v2: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org v2: I've gone through each comment and implemented each suggestion since IMO they were all good/correct comments. Detail: - Moves x1e80100 camcc to its own yaml - Krzysztof - csid_wrapper comes first because it is the most relevant register set - configuring all CSID blocks subordinate to it - bod, Krzysztof - Fixes missing commit log - Krz - Updates to latest format established @ sc7280 - bod - Includes CSID lite which I forgot to add @ v1 - Konrad, bod - Replaces static ICC parameters with defines - Konrad - Drops newlines between x and x-name - Konrad - Drops redundant iommu extents - Konrad - Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com - Interrupt EDGE_RISING - Vladimir - Implements suggested regulator names pending refactor to PHY API - Vladimir - Drop slow_ahb_src clock - Vladimir Link to v1: https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3 v1: This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (4): dt-bindings: media: Add qcom,x1e80100-camss arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 351 ++++++++++++++++++++ 2 files changed, 718 insertions(+) --- base-commit: 0907e7fb35756464aa34c35d6abb02998418164b change-id: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 Best regards,