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[88.10.54.249]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389046885esm104532655e9.36.2025.01.19.07.44.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jan 2025 07:44:50 -0800 (PST) From: Sergio Paracuellos To: linux-clk@vger.kernel.org Cc: sboyd@kernel.org, mturquette@baylibre.com, tsbogend@alpha.franken.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, p.zabel@pengutronix.de, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, yangshiji66@outlook.com, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/6] mips: dts: ralink: update system controller nodes and its consumers Date: Sun, 19 Jan 2025 16:44:41 +0100 Message-Id: <20250119154447.462857-1-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi all! Ralinks SoCs have a system controller node which serves as clock and reset providers for the rest of the world. This patch series introduces clock and reset definitions for these SoCs. The clocks are registered in the driver using a bunch of arrays in specific order so these definitions represent the assigned identifier that is used when this happens so client nodes can easily use it to specify the clock which they consume without the need of checking driver code. For the resets the definitions are the reset related bits in reset register of the system controller node. DTS files which are currently on tree are not matching system controller bindings. So all of them are updated to properly match them. I'd like this series to go through kernel mips git tree if possible. Thanks in advance for your time. Changes in v2: - Redo commit messages in all the patches in the series to clarify why the changes are needed asked by Krzysztof in v1. v1 of this series: - https://lore.kernel.org/linux-clk/20250115153019.407646-1-sergio.paracuellos@gmail.com/T/#t Best regards, Sergio Paracuellos Sergio Paracuellos (6): dt-bindings: clock: add clock and reset definitions for Ralink SoCs mips: dts: ralink: rt2880: update system controller node and its consumers mips: dts: ralink: rt3050: update system controller node and its consumers mips: dts: ralink: rt3883: update system controller node and its consumers mips: dts: ralink: mt7620a: update system controller node and its consumers mips: dts: ralink: mt7628a: update system controller node and its consumers .../bindings/clock/mediatek,mtmips-sysc.yaml | 18 ++- arch/mips/boot/dts/ralink/mt7620a.dtsi | 10 +- arch/mips/boot/dts/ralink/mt7628a.dtsi | 43 +++-- arch/mips/boot/dts/ralink/rt2880.dtsi | 10 +- arch/mips/boot/dts/ralink/rt3050.dtsi | 10 +- arch/mips/boot/dts/ralink/rt3883.dtsi | 10 +- .../dt-bindings/clock/mediatek,mtmips-sysc.h | 130 +++++++++++++++ .../dt-bindings/reset/mediatek,mtmips-sysc.h | 152 ++++++++++++++++++ 8 files changed, 357 insertions(+), 26 deletions(-) create mode 100644 include/dt-bindings/clock/mediatek,mtmips-sysc.h create mode 100644 include/dt-bindings/reset/mediatek,mtmips-sysc.h