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Wed, 12 Feb 2025 08:23:04 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51C8N39I010427 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Feb 2025 08:23:03 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 12 Feb 2025 00:22:56 -0800 From: Taniya Das <quic_tdas@quicinc.com> Subject: [PATCH v3 0/4] Update LPASS Audio clock driver for QCM6490 board Date: Wed, 12 Feb 2025 13:52:18 +0530 Message-ID: <20250212-lpass_qcm6490_resets-v3-0-0b1cfb35b38e@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: <linux-clk.vger.kernel.org> List-Subscribe: <mailto:linux-clk+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-clk+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; 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Update LPASS Audio clock driver for QCM6490 board
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This series updates the low pass audio clock controller driver for reset functionality. The patches are split from the below series. https://lore.kernel.org/all/20240318053555.20405-1-quic_tdas@quicinc.com/ The QCM6490 board requires only the reset functionality from the LPASS subsystem. Thus separate out the driver probe to provide the same on the QCM6490 boards. [v3]: Changes in [v3] compared to [v2]: - update to Documentation bindings adding constraints. [Krzysztof] - split the DT patch for "Update protected clocks list" for QCM6490 IDP https://lore.kernel.org/linux-devicetree/20250206-protected_clock_qcm6490-v1-1-5923e8c47ab5@quicinc.com/ [v2]: Changes in [v2] compared to [v1]: - Updated the lpass_audio_cc_sc7280 probe to get the match_data for both SC7280 and QCM6490. - Separate regmap for resets [Konrad] - Split the lpassaudiocc compatible and GCC protected clocks list changes. [Dmitry] - Link to V1: https://lore.kernel.org/all/20240531102252.26061-1-quic_tdas@quicinc.com/T/ [v1] - Add a separate platform driver for QCM6490 resets. - Add device tree changes for protected clocks for GCC and LPASS AudioCC compatible update. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- Taniya Das (4): dt-bindings: clock: qcom: Add compatible for QCM6490 boards clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490 arm64: dts: qcom: qcm6490-idp: Update the LPASS audio node arm64: dts: qcom: qcs6490-rb3gen2: Update the LPASS audio node .../bindings/clock/qcom,sc7280-lpasscorecc.yaml | 14 +++++++++++++ arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 5 +++++ arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 +++++ drivers/clk/qcom/lpassaudiocc-sc7280.c | 23 ++++++++++++++++++---- 4 files changed, 43 insertions(+), 4 deletions(-) --- base-commit: 808eb958781e4ebb6e9c0962af2e856767e20f45 change-id: 20250206-lpass_qcm6490_resets-204f86622a5c Best regards,