Show patches with: Submitter = Boris Brezillon       |   9 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[2/2] dt-bindings: clock: Add bindings for the Clocking Wizard IP [1/2] clk: Add a driver for the Xilinx Clocking Wizard block - 1 - --- 2018-08-01 Boris Brezillon Changes Requested
[1/2] clk: Add a driver for the Xilinx Clocking Wizard block [1/2] clk: Add a driver for the Xilinx Clocking Wizard block - - - --- 2018-08-01 Boris Brezillon Changes Requested
MAINTAINERS: Remove the AT91 clk driver entry 1 - - --- 2018-06-13 Boris Brezillon Awaiting Upstream
[v2] clk: bcm2835: De-assert/assert PLL reset signal when appropriate - 1 - --- 2018-03-22 Boris Brezillon Accepted
Update Boris Brezillon email address - - - --- 2018-02-16 Boris Brezillon Not Applicable
[4/4] clk: bcm2835: Make sure the PLL is gated before changing its rate - - - --- 2018-02-08 Boris Brezillon Changes Requested
[3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate - - - --- 2018-02-08 Boris Brezillon Changes Requested
[2/4] clk: bcm2835: Protect sections updating shared registers - 1 - --- 2018-02-08 Boris Brezillon Accepted
[1/4] clk: bcm2835: Fix ana->maskX definitions - 1 - --- 2018-02-08 Boris Brezillon Accepted