Show patches with: Submitter = Biju Das       |   232 patches
« 1 2 3 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[07/12] clk: renesas: rzv2h-cpg: Add MSTOP support Add support for Renesas RZ/G3E SoC and SMARC-EVK platform - - - --- 2024-11-22 Biju Das Under Review
[06/12] clk: renesas: Add support for RZ/G3E SoC Add support for Renesas RZ/G3E SoC and SMARC-EVK platform - - - --- 2024-11-22 Biju Das Under Review
[04/12] dt-bindings: clock: renesas: Document RZ/G3E SoC CPG Add support for Renesas RZ/G3E SoC and SMARC-EVK platform - - - --- 2024-11-22 Biju Das Under Review
[v4] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk [v4] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk - 1 - --- 2024-10-24 Biju Das Awaiting Upstream
[v3] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk [v3] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk - - - --- 2024-10-16 Biju Das Awaiting Upstream
[v2] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk [v2] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk - - - --- 2024-10-11 Biju Das Changes Requested
clk: renesas: rzg2l: Fix FOUTPOSTDIV clk clk: renesas: rzg2l: Fix FOUTPOSTDIV clk - - - --- 2024-10-09 Biju Das Awaiting Upstream
[v2,4/9] clk: renesas: r9a07g043: Add LCDC clock and reset entries Untitled series #869719 - 1 - --- 2024-07-09 Biju Das Awaiting Upstream
[4/9] clk: renesas: r9a07g043: Add LCDC clock and reset entries Untitled series #867480 - - - --- 2024-07-02 Biju Das Awaiting Upstream
[v3,2/3] clk: Add clk_poll_disable_unprepare() Add clk_poll_disable_unprepare() - - - --- 2024-03-18 Biju Das Changes Requested
[v3,1/3] clk: Update API documentation related to clock disable Add clk_poll_disable_unprepare() 1 - - --- 2024-03-18 Biju Das Changes Requested
[v2,2/3] clk: Add clk_poll_disable_unprepare() Add clk_poll_disable_unprepare() - - - --- 2024-02-20 Biju Das Superseded
[v2,1/3] clk: Update API documentation related to clock disable Add clk_poll_disable_unprepare() - - - --- 2024-02-20 Biju Das Superseded
[RFC,2/3] clk: renesas: rzg2l: Add disable_sync() callback Add clk_disable_unprepare_sync() - - - --- 2024-01-31 Biju Das RFC
[RFC,1/3] clk: Add clk_disable_unprepare_sync() Add clk_disable_unprepare_sync() - - - --- 2024-01-31 Biju Das RFC
clk: renesas: r9a07g043: Add clock and reset entries for CRU clk: renesas: r9a07g043: Add clock and reset entries for CRU - 1 - --- 2024-01-23 Biju Das Awaiting Upstream
[5/5] clk: versaclock3: Drop ret variable Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[4/5] clk: versaclock3: Add missing space between ')' and '{' Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[3/5] clk: versaclock3: Use u8 return type for get_parent() callback Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[2/5] clk: versaclock3: Avoid unnecessary padding Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[1/5] clk: versaclock3: Update vc3_get_div() to avoid divide by zero Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
clk: vc3: Use clamp() instead of min_t() clk: vc3: Use clamp() instead of min_t() - - - --- 2023-10-04 Biju Das Changes Requested
clk: si570: Simplify probe() clk: si570: Simplify probe() - - - --- 2023-09-09 Biju Das Accepted
clk: si5351: Simplify probe() clk: si5351: Simplify probe() - - - --- 2023-09-09 Biju Das Accepted
clk: rs9: Use i2c_get_match_data() instead of device_get_match_data() clk: rs9: Use i2c_get_match_data() instead of device_get_match_data() - - - --- 2023-09-09 Biju Das Accepted
clk: clk-si544: Simplify probe() and is_valid_frequency() clk: clk-si544: Simplify probe() and is_valid_frequency() - - - --- 2023-09-09 Biju Das Accepted
clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data() clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data() - - - --- 2023-09-09 Biju Das Accepted
clk: cdce925: Extend match support for OF tables clk: cdce925: Extend match support for OF tables - - - --- 2023-09-09 Biju Das Accepted
[v5,4/4] clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum values Fix Versa3 clock mapping - 1 - --- 2023-08-24 Biju Das Accepted
[v5,3/4] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - 1 - --- 2023-08-24 Biju Das Accepted
[v5,2/4] clk: vc3: Fix 64 by 64 division Fix Versa3 clock mapping - - - --- 2023-08-24 Biju Das Accepted
[v5,1/4] dt-bindings: clock: versaclock3: Add description for #clock-cells property Fix Versa3 clock mapping 2 1 - --- 2023-08-24 Biju Das Accepted
[v4,4/4] clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum values Fix Versa3 clock mapping - - - --- 2023-08-24 Biju Das Superseded
[v4,3/4] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - 1 - --- 2023-08-24 Biju Das Superseded
[v4,2/4] clk: vc3: Fix 64 by 64 division Fix Versa3 clock mapping - - - --- 2023-08-24 Biju Das Superseded
[v4,1/4] dt-bindings: clock: versaclock3: Fix the assigned-clock-rates Fix Versa3 clock mapping 2 - - --- 2023-08-24 Biju Das Superseded
[v3,4/4] clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum values Fix Versa3 clock mapping - - - --- 2023-08-17 Biju Das Accepted
[v3,3/4] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - 1 - --- 2023-08-17 Biju Das Accepted
[v3,2/4] clk: vc3: Fix 64 by 64 division Fix Versa3 clock mapping - - - --- 2023-08-17 Biju Das Changes Requested
[v3,1/4] dt-bindings: clock: versaclock3: Document clock-output-names Fix Versa3 clock mapping 1 - - --- 2023-08-17 Biju Das Accepted
[v2,2/3] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - 1 - --- 2023-08-17 Biju Das Superseded
[v2,1/3] dt-bindings: clock: versaclock3: Document clock-output-names Fix Versa3 clock mapping 1 - - --- 2023-08-17 Biju Das Changes Requested
[2/3] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - - - --- 2023-08-02 Biju Das Superseded
[1/3] dt-bindings: clock: versaclock3: Document clock-output-names Fix Versa3 clock mapping - - - --- 2023-08-02 Biju Das Superseded
[v2] clk: vc3: Fix 64 by 64 division [v2] clk: vc3: Fix 64 by 64 division - - - --- 2023-08-02 Biju Das Superseded
clk: vc3: Fix 64 by 64 division clk: vc3: Fix 64 by 64 division - - - --- 2023-08-01 Biju Das Superseded
clk: Fix undefined reference to `clk_rate_exclusive_{get,put}' clk: Fix undefined reference to `clk_rate_exclusive_{get,put}' - - - --- 2023-07-25 Biju Das Accepted
[v2,2/2] clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() for versa{5,7} drivers - 2 - --- 2023-07-21 Biju Das Accepted
[v2,1/2] clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() for versa{5,7} drivers - 3 - --- 2023-07-21 Biju Das Accepted
[2/2] clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() - 2 - --- 2023-07-16 Biju Das Changes Requested
[1/2] clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() - 2 - --- 2023-07-16 Biju Das Changes Requested
clk: renesas: r9a07g043: Add MTU3a clock and reset entry clk: renesas: r9a07g043: Add MTU3a clock and reset entry - 1 - --- 2023-07-14 Biju Das Awaiting Upstream
[v6,2/2] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-07-05 Biju Das Accepted
[v6,1/2] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 1 - --- 2023-07-05 Biju Das Accepted
[v4] i2c: Add i2c_get_match_data() [v4] i2c: Add i2c_get_match_data() - - - --- 2023-06-07 Biju Das Not Applicable
clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write - 1 - --- 2023-05-18 Biju Das Awaiting Upstream
[v5,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-04-13 Biju Das Not Applicable
[v5,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 1 - --- 2023-04-13 Biju Das Not Applicable
[v4,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-04-04 Biju Das Changes Requested
[v4,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 1 - --- 2023-04-04 Biju Das Superseded
[v3,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-04-03 Biju Das Changes Requested
[v3,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 1 - --- 2023-04-03 Biju Das Superseded
[v2,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-03-09 Biju Das Changes Requested
[v2,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 1 - --- 2023-03-09 Biju Das Changes Requested
[RFC,3/3] arm64: dts: renesas: rzg2l-smarc: Use versa3 clk for audio mclk Add Versa3 clock generator support - - - --- 2023-02-20 Biju Das Not Applicable
[RFC,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-02-20 Biju Das Changes Requested
[RFC,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 2 - --- 2023-02-20 Biju Das Changes Requested
[01/16] clk: renesas: r9a09g011: Add USB clock and reset entries [01/16] clk: renesas: r9a09g011: Add USB clock and reset entries - 1 - --- 2022-12-12 Biju Das Awaiting Upstream
[1/6] clk: renesas: r9a09g011: Add TIM clock and reset entries Add RZ/V2M Compare-Match Timer (TIM) support - 1 - --- 2022-12-05 Biju Das Superseded
[v2,1/5] clk: renesas: r9a09g011: Add PWM clock and reset entries Add RZ/V2{M, MA} PWM driver support - 1 - --- 2022-11-24 Biju Das Awaiting Upstream
[1/5] clk: renesas: r9a09g011: Add PWM clock entries Add RZ/V2{M, MA} driver support - - - --- 2022-11-18 Biju Das Changes Requested
clk: renesas: r9a07g044: Add MTU3a clock and reset entry clk: renesas: r9a07g044: Add MTU3a clock and reset entry - 1 - --- 2022-10-05 Biju Das Awaiting Upstream
[RFC,1/8] clk: renesas: r9a07g044: Add MTU3a clock and reset entry Add RZ/G2L MTU3a MFD and Counter driver - - - --- 2022-09-26 Biju Das Awaiting Upstream
clk: renesas: rzg2l: Support sd clk mux round operation clk: renesas: rzg2l: Support sd clk mux round operation - 1 - --- 2022-09-19 Biju Das Awaiting Upstream
clk: renesas: r9a07g044: Fix 533MHz PLL2/3 clock multiplier and divider values clk: renesas: r9a07g044: Fix 533MHz PLL2/3 clock multiplier and divider values - - - --- 2022-09-13 Biju Das Changes Requested
clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info - 1 - --- 2022-08-04 Biju Das Awaiting Upstream
clk: renesas: rzg2l: Fix reset status function clk: renesas: rzg2l: Fix reset status function - 1 - --- 2022-05-31 Biju Das Awaiting Upstream
[2/2] clk: renesas: r9a07g044: Add POEG clock and reset entries Add GPT and POEG clock and reset entries - 1 - --- 2022-05-10 Biju Das Awaiting Upstream
[1/2] clk: renesas: r9a07g044: Add GPT clock and reset entry Add GPT and POEG clock and reset entries - 1 - --- 2022-05-10 Biju Das Awaiting Upstream
clk: renesas: cpg-mssr: Add a delay after deassert clk: renesas: cpg-mssr: Add a delay after deassert - - - --- 2022-05-04 Biju Das Changes Requested
[4/4] clk: renesas: r9a07g043: Add clock and reset entries for ADC Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[3/4] clk: renesas: r9a07g043: Add TSU clock and reset entry Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[2/4] clk: renesas: r9a07g043: Add RSPI clock and reset entries Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[1/4] clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[v3,9/9] clk: renesas: r9a07g044: Add DSI clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,8/9] clk: renesas: r9a07g044: Add LCDC clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,7/9] clk: renesas: r9a07g044: Add M4 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,6/9] clk: renesas: r9a07g044: Add M3 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,5/9] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,4/9] clk: renesas: r9a07g044: Add M1 clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,3/9] clk: renesas: rzg2l: Add DSI divider clk support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,2/9] clk: renesas: rzg2l: Add PLL5_4 clk mux support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v3,1/9] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Add RZ/G2L Display clock support - 1 - --- 2022-04-30 Biju Das Awaiting Upstream
[v2,9/9] clk: renesas: r9a07g044: Add DSI clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,8/9] clk: renesas: r9a07g044: Add LCDC clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,7/9] clk: renesas: r9a07g044: Add M4 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,6/9] clk: renesas: r9a07g044: Add M3 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,5/9] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,4/9] clk: renesas: r9a07g044: Add M1 clock support Add RZ/G2L Display clock support - 1 - --- 2022-04-27 Biju Das Superseded
[v2,3/9] clk: renesas: rzg2l: Add DSI divider clk support Add RZ/G2L Display clock support - - - --- 2022-04-27 Biju Das Changes Requested
« 1 2 3 »