Show patches with: Submitter = Zhang Qilong       |   3 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
clk: ti: Fix memleak in ti_fapll_synth_setup clk: ti: Fix memleak in ti_fapll_synth_setup 1 - - --- 2020-11-13 Zhang Qilong Accepted
[-next,v2] clk: tegra: clk-dfll: indicate correct error reason in tegra_dfll_register [-next,v2] clk: tegra: clk-dfll: indicate correct error reason in tegra_dfll_register - - - --- 2020-09-23 Zhang Qilong Awaiting Upstream
[-next] clk: tegra: clk-dfll: indicate correct error reason in tegra_dfll_register [-next] clk: tegra: clk-dfll: indicate correct error reason in tegra_dfll_register - - - --- 2020-09-18 Zhang Qilong Changes Requested